StanfordVLSI / DaVELinks
tools regarding on analog modeling, validation, and generation
☆22Updated 2 years ago
Alternatives and similar repositories for DaVE
Users that are interested in DaVE are comparing it to the libraries listed below
Sorting:
- Open Source PHY v2☆30Updated last year
- Automatic generation of real number models from analog circuits☆43Updated last year
- An open source PDK using TIGFET 10nm devices.☆50Updated 2 years ago
- Open source process design kit for 28nm open process☆61Updated last year
- ☆44Updated 5 years ago
- Library of open source Process Design Kits (PDKs)☆51Updated this week
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- Verilog VPI module to dump FST (Fast Signal Trace) databases☆16Updated last year
- Designs for Process-Voltage-Temperature (PVT) Sensors with MCU☆23Updated 5 years ago
- A library and command-line tool for querying a Verilog netlist.☆28Updated 3 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆42Updated 2 years ago
- Python library for working Standard Delay Format (SDF) Timing Annotation files.☆30Updated last year
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆26Updated 2 months ago
- LibreSilicon's Standard Cell Library Generator☆20Updated last year
- Open FPGA Modules☆24Updated 11 months ago
- Calling a python function from SV, then have this python function call SV tasks. Useful for coding register sequences in python☆11Updated 2 years ago
- ☆33Updated 2 years ago
- Intel's Analog Detailed Router☆39Updated 6 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆43Updated 5 years ago
- This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk☆32Updated 4 years ago
- ASIC Design of the openSPARC Floating Point Unit☆14Updated 8 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- repository for a bandgap voltage reference in SKY130 technology☆40Updated 2 years ago
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆38Updated 2 months ago
- SAR ADC on tiny tapeout☆42Updated 7 months ago
- ☆20Updated 3 years ago
- submission repository for efabless mpw6 shuttle☆30Updated last year
- A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.☆36Updated 4 years ago
- ☆19Updated last year
- This project presents a 10Gb/s transceiver design using 65nm CMOS process, based on a 10GBASE-KR standard.☆24Updated 6 years ago