asyncvlsi / AMCLinks
AMC: Asynchronous Memory Compiler
☆52Updated 5 years ago
Alternatives and similar repositories for AMC
Users that are interested in AMC are comparing it to the libraries listed below
Sorting:
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆28Updated 4 years ago
- A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.☆44Updated 2 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆37Updated 3 years ago
- ideas and eda software for vlsi design☆51Updated 3 weeks ago
- A configurable SRAM generator☆57Updated 5 months ago
- SRAM☆22Updated 5 years ago
- ☆44Updated 6 years ago
- This is a tutorial on standard digital design flow☆83Updated 4 years ago
- A free standard cell library for SDDS-NCL circuits☆28Updated 2 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆82Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆55Updated 3 years ago
- Open source process design kit for 28nm open process☆72Updated last year
- Wavious DDR (WDDR) Physical interface (PHY) Hardware☆122Updated 4 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆48Updated last year
- ☆68Updated 3 years ago
- ☆41Updated 3 years ago
- ☆33Updated last year
- Code to read various RTL simulator wave formats (fsdb, shm, vcd, wlf) into python and apply it as stimuli via cocotb/plain vpi.☆63Updated 4 years ago
- Python Tool for UVM Testbench Generation☆55Updated last year
- Synthesizable real number library in SystemVerilog, supporting both fixed- and floating-point formats☆51Updated 5 years ago
- Python library of AST nodes for SystemVerilog/VHDL, code generator, transpiler and translator☆41Updated 2 months ago
- Intel's Analog Detailed Router☆40Updated 6 years ago
- ☆56Updated 2 years ago
- Introductory course into static timing analysis (STA).☆99Updated 6 months ago
- ☆38Updated 3 years ago
- Universal Verification Methodology (UVM) base libraries, with edits for Verilator☆26Updated 3 months ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆163Updated 2 months ago
- 55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.☆166Updated last month
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆37Updated 3 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆79Updated 5 years ago