Alternatives and similar repositories for AMC

Users that are interested in AMC are comparing it to the libraries listed below

• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆37Updated 2 years ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆49Updated 2 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆73Updated 4 years ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆60Updated last year
• marlls1989 / ascend-freepdk45
  A free standard cell library for SDDS-NCL circuits
  ☆27Updated 2 years ago
• rahulk29 / sram22
  A configurable SRAM generator
  ☆53Updated 3 weeks ago
• woset-workshop / woset-workshop.github.io
  Workshop on Open-Source EDA Technology (WOSET)
  ☆48Updated 8 months ago
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆27Updated 4 years ago
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆42Updated 2 years ago
• intel / aib-phy-hardware
  ☆66Updated 2 years ago
• idea-fasoc / fasoc
  ☆55Updated last year
• efabless / sky130_sram_macros_old
  ☆38Updated 3 years ago
• ReuelReuben / vsdSRAM
  SRAM
  ☆22Updated 4 years ago
• bojackchen / digital-flow
  This is a tutorial on standard digital design flow
  ☆78Updated 4 years ago
• aolofsson / POSH
  ☆44Updated 5 years ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• greenblat / vlsistuff
  ideas and eda software for vlsi design
  ☆50Updated last week
• pulp-platform / svase
  ☆32Updated 6 months ago
• The-OpenROAD-Project / alpha-release
  Builds, flow and designs for the alpha release
  ☆54Updated 5 years ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆50Updated 3 months ago
• stineje / CharLib
  Open-source repository for a standard-cell library characterizer using complete open-source tools
  ☆35Updated last week
• yash-k99 / vsdsram
  Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM
  ☆19Updated 4 years ago
• StanfordVLSI / dragonphy2
  Open Source PHY v2
  ☆29Updated last year
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• parallaxsw / OpenSTA
  ☆78Updated last week
• cornell-brg / pymtl3-net
  Project repo for the POSH on-chip network generator
  ☆49Updated 4 months ago
• praharshapm / vsdmixedsignalflow
  This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…
  ☆44Updated 4 years ago
• sgherbst / svreal
  Synthesizable real number library in SystemVerilog, supporting both fixed- and floating-point formats
  ☆45Updated 4 years ago
• YosysHQ-GmbH / SVA-AXI4-FVIP
  YosysHQ SVA AXI Properties
  ☆42Updated 2 years ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆73Updated 4 years ago