mcci-catena / catena-riscv32-fpgaLinks
RISC-V 32-bit core for MCCI Catena 4710
☆10Updated 6 years ago
Alternatives and similar repositories for catena-riscv32-fpga
Users that are interested in catena-riscv32-fpga are comparing it to the libraries listed below
Sorting:
- USB 2.0 Device IP core using Migen with out-of-box AXI Slave Interface☆12Updated 8 years ago
- A configurable USB 2.0 device core☆32Updated 5 years ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆21Updated 5 years ago
- ☆20Updated 3 years ago
- The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…☆36Updated 4 years ago
- Cross compile FPGA tools☆21Updated 4 years ago
- A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga☆26Updated 6 years ago
- USB virtual model in C++ for Verilog☆32Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆23Updated 4 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆52Updated 2 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆37Updated 6 years ago
- A padring generator for ASICs☆25Updated 2 years ago
- vhd2vl is designed to translate synthesizable VHDL into Verilog 2001.☆26Updated 9 years ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆22Updated 2 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated last month
- A CIC filter implemented in Verilog☆23Updated 10 years ago
- Everything needed for ulx3s FPGA☆15Updated 5 years ago
- LMAC Core1 - Ethernet 1G/100M/10M☆18Updated 2 years ago
- Atom Hardware IDE☆13Updated 4 years ago
- The first-ever opensource RTL core for PCIE EndPoint. Without vendor-locked HMs for Data Link, Transaction, Application layers; With stan…☆40Updated this week
- System on Chip toolkit for nMigen☆19Updated 5 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆26Updated last month
- FPGA USB 1.1 Low-Speed Implementation☆34Updated 7 years ago
- A simple spidergon network-on-chip with wormhole switching feature☆12Updated 4 years ago
- Simplified environment for litex☆14Updated 5 years ago
- Universal Advanced JTAG Debug Interface☆17Updated last year
- MMC (and derivative standards) host controller☆24Updated 5 years ago
- Wishbone interconnect utilities☆43Updated 9 months ago
- ☆13Updated 4 years ago
- Automated Git mirror of Gaisler's GRLIB/Leon3 releases☆20Updated 2 weeks ago