ReuelReuben / vsdSRAMLinks
SRAM
☆22Updated 4 years ago
Alternatives and similar repositories for vsdSRAM
Users that are interested in vsdSRAM are comparing it to the libraries listed below
Sorting:
- Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM☆19Updated 4 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆72Updated 4 years ago
- ☆41Updated 3 years ago
- AMC: Asynchronous Memory Compiler☆49Updated 5 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆70Updated 4 years ago
- Open source process design kit for 28nm open process☆59Updated last year
- ☆32Updated 6 months ago
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…☆33Updated 5 years ago
- Accelerating the AES algorithm on an FPGA and comparing the speedup with both AES and Modified AES algorithms☆27Updated 3 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆27Updated 4 years ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆85Updated last year
- A configurable SRAM generator☆53Updated this week
- The memory model was leveraged from micron.☆22Updated 7 years ago
- The Verilog source code for DRUM approximate multiplier.☆31Updated 2 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆37Updated 2 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- SoCGen is a tool that automates SoC design by taking in a JSON description of the system and producing the final GDS-II. SoCGen supports …☆39Updated 4 years ago
- A RRAM addon for the NCSU FreePDK 45nm☆23Updated 3 years ago
- General Purpose AXI Direct Memory Access☆53Updated last year
- This is a tutorial on standard digital design flow☆78Updated 4 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆46Updated 4 years ago
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆41Updated 5 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆67Updated 6 months ago
- Introductory course into static timing analysis (STA).☆94Updated last week
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆36Updated 2 years ago
- ☆47Updated 3 months ago
- Workshop on Open-Source EDA Technology (WOSET)☆49Updated 7 months ago
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆43Updated 3 years ago
- A barebones 64-bit RISC-V micro-controller class CPU, implementing the I(nteger), M(ul/div), C(ompressed) and K(ryptography) extensions.☆45Updated 3 years ago
- Characterizer☆28Updated last month