Design of a 32-kbit synchronous SRAM with 32-bit words, using 180 nm process technology. Developed MATLAB scripts to evaluate architectural trade-offs between performance (using logical effort analysis) and area usage; see the source code for the HSPICE decks and MATLAB scripts that are used during architectural trade-off evaluation, and charac…
☆16Apr 28, 2021Updated 5 years ago
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