Alternatives and similar repositories for globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0

Users that are interested in globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0 are comparing it to the libraries listed below

• google / globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0
  7 track standard cells for GF180MCU provided by GlobalFoundries.
  ☆26Updated 2 years ago
• google / skywater-pdk-libs-sky130_fd_bd_sram
  SRAM build space for SKY130 provided by SkyWater.
  ☆22Updated 3 years ago
• google / skywater-pdk-libs-sky130_fd_pr
  Primitives for SKY130 provided by SkyWater.
  ☆27Updated last year
• google / globalfoundries-pdk-ip-gf180mcu_fd_ip_sram
  SRAM macros created for the GF180MCU provided by GlobalFoundries.
  ☆17Updated 2 years ago
• google / globalfoundries-pdks
  Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.
  ☆48Updated 3 years ago
• verilator / verilator_ext_tests
  Extended and external tests for Verilator testing
  ☆16Updated this week
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆36Updated 2 years ago
• google / globalfoundries-pdk-libs-gf180mcu_fd_pr
  Primitives for GF180MCU provided by GlobalFoundries.
  ☆51Updated 2 years ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 3 years ago
• ieee-ceda-datc / datc-rdf-calibrations
  ☆18Updated 10 months ago
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆42Updated 2 years ago
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆49Updated 2 years ago
• thesourcerer8 / StdCellLib
  LibreSilicon's Standard Cell Library Generator
  ☆20Updated last year
• iic-jku / SKY130_SAR-ADC1
  Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
  ☆43Updated 5 months ago
• FPGA-Research / eFPGA---RTL-to-GDS-with-SKY130
  This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
  ☆31Updated 4 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• google / skywater-pdk-sky130-raw-data
  Raw data collected about the SKY130 process technology.
  ☆58Updated 2 years ago
• efabless / caravel-lite
  ☆17Updated 9 months ago
• mabrains / OpenAnalogDesign
  Open Analog Design Environment
  ☆24Updated 2 years ago
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 5 years ago
• vsdip / vsdsram_sky130
  ☆42Updated 3 years ago
• AsFigo / svck
  ☆14Updated 3 months ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆60Updated last year
• efabless / caravel_mgmt_soc_litex
  https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/
  ☆28Updated 7 months ago
• Deepak42074 / vsdsram_sky130
  Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns
  ☆13Updated 4 years ago
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆23Updated 2 months ago
• chipsalliance / f4pga-sdf-timing
  Python library for working Standard Delay Format (SDF) Timing Annotation files.
  ☆30Updated last year
• efabless / sky130_sram_macros_old
  ☆38Updated 3 years ago