Alternatives and similar repositories for FreePDK45_for_KLayout

Users that are interested in FreePDK45_for_KLayout are comparing it to the libraries listed below

• laurentc2 / SKY130_for_KLayout
  KLayout technology files for Skywater SKY130
  ☆39Updated last year
• The-OpenROAD-Project / OpenRCX
  ☆22Updated 4 years ago
• bluecheetah / bag
  BAG framework
  ☆40Updated 9 months ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 3 years ago
• efabless / cace
  Circuit Automatic Characterization Engine
  ☆47Updated 3 months ago
• RTimothyEdwards / qrouter
  Qrouter detail router for digital ASIC designs
  ☆57Updated last month
• ucb-art / bag
  BAG framework
  ☆29Updated 4 months ago
• bluecheetah / cbag
  A C++ VLSI circuit schematic and layout database library
  ☆14Updated 10 months ago
• patrickschulz / openPCells
  Parametric layout generator for digital, analog and mixed-signal integrated circuits
  ☆53Updated last week
• RTimothyEdwards / netgen
  Netgen complete LVS tool for comparing SPICE or verilog netlists
  ☆116Updated last month
• mabrains / sky130_klayout_pdk
  Skywater 130nm Klayout Device Generators PDK
  ☆31Updated 10 months ago
• MatBucher / ekv3model
  ☆18Updated last year
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆62Updated last week
• dwarning / VA-Models
  Verilog-A simulation models
  ☆71Updated 4 months ago
• ashwith / pyMOSChar
  Python port of Prof. Boris Murmann's gm/ID Starter Kit
  ☆54Updated 7 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• chipsalliance / aib-phy-generator
  AIB Generator: Analog hardware compiler for AIB PHY
  ☆33Updated 4 years ago
• cascode-labs / virtue
  A Python and SKILL Framework for Cadence Virtuoso
  ☆37Updated last year
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆38Updated 2 years ago
• dan-fritchman / Hdl21
  Hardware Description Library
  ☆78Updated last month
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆38Updated 5 years ago
• wulffern / aicex
  Files for Advanced Integrated Circuits
  ☆28Updated 2 months ago
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆55Updated 2 years ago
• sgherbst / msdsl
  Automatic generation of real number models from analog circuits
  ☆39Updated last year
• ucdrstdenis / cdsAsync
  cdsAsync: An Asynchronous QDI VLSI Toolset & Schematic Library
  ☆25Updated 5 years ago
• niftylab / laygo2
  LAYout with Gridded Objects v2
  ☆55Updated 3 months ago
• magical-eda / MAGICAL-CIRCUITS
  Circuit release of the MAGICAL project
  ☆34Updated 5 years ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• efabless / foss-asic-tools
  FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…
  ☆81Updated 8 months ago
• ananthchellappa / SKILL
  Cadence SKILL utilities that have boosted my productivity considerably for 10+ years.
  ☆43Updated 2 weeks ago