B0WEN-HU / gr-verilogLinks
This is an OOT module for GNU Radio integrating verilog simulation feature
☆38Updated 5 years ago
Alternatives and similar repositories for gr-verilog
Users that are interested in gr-verilog are comparing it to the libraries listed below
Sorting:
- LiteX Accelerator Block for GNU Radio☆24Updated 3 years ago
- ☆18Updated 2 years ago
- OscillatorIMP ecosystem for the digital characterization of ultrastable oscillators and Software Defined Radio (SDR) frontend processing☆57Updated 3 weeks ago
- Open source FPGA cores for digital signal processing (push mirror from gitlab.com/theseus-cores/theseus-cores)☆16Updated 3 years ago
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆71Updated 3 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆31Updated 2 years ago
- FPGA board-level debugging and reverse-engineering tool☆38Updated 2 years ago
- HDL code for a complex multiplier with AXI stream interface☆16Updated 2 years ago
- Small footprint and configurable JESD204B core☆45Updated 2 months ago
- A basic Soft(Gate)ware Defined Radio architecture☆91Updated last year
- Generic Logic Interfacing Project☆46Updated 5 years ago
- All Digital Radio Platform written in nmigen targeting FPGAs (for now)☆81Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆60Updated last month
- This repository contains iCEBreaker examples for Amaranth HDL.☆39Updated last year
- ☆29Updated 4 years ago
- ☆20Updated 3 years ago
- Everything needed for ulx3s FPGA☆15Updated 4 years ago
- Repository containing the DSP gateware cores☆13Updated 3 weeks ago
- Work being done on the DVB-receiver for Phase 4 Ground.☆58Updated 2 years ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆51Updated last year
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆29Updated 2 years ago
- RTL implementation of components for DVB-S2☆121Updated 2 years ago
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆45Updated last week
- LiteX development baseboards arround the SQRL Acorn.☆68Updated 4 months ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆22Updated 3 years ago
- This repository contains synthesizable examples which use the PoC-Library.☆38Updated 4 years ago
- A demonstration showing how several components can be compsed to build a simulated spectrogram☆46Updated last year
- Library of reusable VHDL components☆28Updated last year
- LimeSDR XTRX gateware project.☆16Updated 5 months ago
- lightweight open HLS for FPGA rapid prototyping☆20Updated 7 years ago