ACT hardware description language and core tools.
☆127Apr 10, 2026Updated 3 weeks ago
Alternatives and similar repositories for act
Users that are interested in act are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Top-level repository for the ACT EDA flow☆37Updated this week
- AMC: Asynchronous Memory Compiler☆53Jun 29, 2020Updated 5 years ago
- Hierarchical Asynchronous Circuit Kompiler Toolkit☆24Dec 17, 2025Updated 4 months ago
- ARV: Asynchronous RISC-V Go High-level Functional Model☆25May 18, 2021Updated 4 years ago
- ☆10Jun 4, 2021Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- Pulsar asynchronous synthesis framework☆13Apr 2, 2021Updated 5 years ago
- Summer School Week 1 & 2 repo☆12Jul 1, 2022Updated 3 years ago
- Atom linter for Verilog/SystemVerilog, using Icarus Verilog, Slang, Verible or Verilator.☆10Jul 12, 2023Updated 2 years ago
- A C++ VLSI circuit schematic and layout database library☆15Jul 1, 2024Updated last year
- ☆15Jan 25, 2026Updated 3 months ago
- A RISC-V CPU implementation☆16Apr 9, 2020Updated 6 years ago
- Learn, share and collaborate on ASIC design using open tools and technologies☆13Dec 27, 2020Updated 5 years ago
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- A parallel global router using the Galois framework☆31Apr 6, 2026Updated 3 weeks ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- ☆39Apr 10, 2023Updated 3 years ago
- Workshop on Open-Source EDA Technology (WOSET)☆49Nov 18, 2024Updated last year
- DATC Robust Design Flow.☆35Jan 21, 2020Updated 6 years ago
- Integrated Circuit Layout☆61Feb 25, 2025Updated last year
- A coverage library for Chisel designs☆11Mar 12, 2020Updated 6 years ago
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- Lifting Reduction Semantics through Syntactic Sugar☆13May 13, 2018Updated 7 years ago
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 9 months ago
- The Xyce™ Parallel Electronic Simulator☆134Updated this week
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- An Open-Source Silicon Compiler for Reduced-Complexity Reconfigurable Fabrics☆15Apr 25, 2026Updated last week
- Standard Cell Library based Memory Compiler using FF/Latch cells☆165Nov 10, 2025Updated 5 months ago
- A DSL for asynchronous circuits specification☆13Oct 1, 2020Updated 5 years ago
- Carrier for efabless Caravel chip used for Google/Skywater 130nm shuttle program.☆18Sep 24, 2021Updated 4 years ago
- IRSIM switch-level simulator for digital circuits☆36Nov 13, 2025Updated 5 months ago
- Python-based hardware modeling framework☆246Oct 27, 2019Updated 6 years ago
- Intel's Analog Detailed Router☆42Jul 18, 2019Updated 6 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆37Jan 16, 2025Updated last year
- Building and deploying container images for open source electronic design automation (EDA)☆121Oct 3, 2024Updated last year
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- Small footprint and configurable HyperBus core☆14Jul 6, 2022Updated 3 years ago
- ☆45Feb 25, 2025Updated last year
- ☆355Updated this week
- KLayout technology files for ASAP7 FinFET educational process☆25Feb 5, 2023Updated 3 years ago
- An innovative Verilog-A compiler☆185Aug 20, 2024Updated last year
- ☆48Oct 26, 2015Updated 10 years ago
- A Platform for High-Level Parametric Hardware Specification and its Modular Verification☆166Updated this week