The-OpenROAD-Project / yosysLinks
Logic synthesis and ABC based optimization
☆51Updated last month
Alternatives and similar repositories for yosys
Users that are interested in yosys are comparing it to the libraries listed below
Sorting:
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆197Updated 5 years ago
- OpenROAD users should look at this repository first for instructions on getting started☆101Updated 4 years ago
- ☆227Updated 10 months ago
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆275Updated last month
- ☆183Updated 4 years ago
- Introductory course into static timing analysis (STA).☆99Updated 6 months ago
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆163Updated 2 years ago
- ☆98Updated this week
- IDEA project source files☆111Updated 2 months ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆81Updated 4 years ago
- ☆108Updated 6 years ago
- A Standalone Structural Verilog Parser☆99Updated 3 years ago
- Physical Design Flow from RTL to GDS using Opensource tools.☆117Updated 5 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆78Updated 5 years ago
- A complete open-source design-for-testing (DFT) Solution☆176Updated 4 months ago
- Hammer: Highly Agile Masks Made Effortlessly from RTL☆309Updated 3 months ago
- This is a tutorial on standard digital design flow☆82Updated 4 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆28Updated 4 years ago
- Standard Cell Library based Memory Compiler using FF/Latch cells☆162Updated 2 months ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆185Updated last year
- reference block design for the ASAP7nm library in Cadence Innovus☆54Updated last year
- Material for OpenROAD Tutorial at DAC 2020☆46Updated 3 years ago
- AMC: Asynchronous Memory Compiler☆51Updated 5 years ago
- Advanced Interface Bus (AIB) die-to-die hardware open source☆145Updated last year
- FOSS-ASIC-TOOLS is all in one container for SKY130 based design both Analog and Digital. Below is a list of the current tools already ins…☆104Updated last year
- AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream t…☆144Updated this week
- IEEE Solid-State Circuits Society (SSCS) Open-Source Ecosystem (OSE)☆198Updated last month
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆46Updated 5 years ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆44Updated 3 years ago
- Fabric generator and CAD tools.☆214Updated 2 weeks ago