google / skywater-pdk-libs-sky130_fd_sc_hdLinks
"High density" digital standard cells for SKY130 provided by SkyWater.
☆16Updated 2 years ago
Alternatives and similar repositories for skywater-pdk-libs-sky130_fd_sc_hd
Users that are interested in skywater-pdk-libs-sky130_fd_sc_hd are comparing it to the libraries listed below
Sorting:
- GitHub Actions for usage with Google's 130nm manufacturable PDK for SkyWater Technology found @ https://github.com/google/skywater-pdk☆13Updated 4 years ago
- SRAM build space for SKY130 provided by SkyWater.☆22Updated 3 years ago
- 9 track standard cells for GF180MCU provided by GlobalFoundries.☆18Updated 2 years ago
- IO and periphery cells for the GF180MCU provided by GlobalFoundries.☆14Updated 2 years ago
- Primitives for SKY130 provided by SkyWater.☆27Updated last year
- SRAM macros created for the GF180MCU provided by GlobalFoundries.☆17Updated 2 years ago
- IO and periphery cells for SKY130 provided by SkyWater.☆11Updated last year
- 7 track standard cells for GF180MCU provided by GlobalFoundries.☆26Updated 2 years ago
- Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.☆48Updated 3 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆117Updated last year
- Small SERV-based SoC primarily for OpenMPW tapeout☆46Updated 3 months ago
- FPGA tool performance profiling☆102Updated last year
- Primitives for GF180MCU provided by GlobalFoundries.☆51Updated 2 years ago
- ☆42Updated 6 months ago
- Plugins for Yosys developed as part of the F4PGA project.☆83Updated last year
- ☆17Updated last year
- Home of the Advanced Interface Bus (AIB) specification.☆54Updated 3 years ago
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆28Updated 7 months ago
- ☆14Updated 3 years ago
- Extended and external tests for Verilator testing☆16Updated this week
- Raw data collected about the SKY130 process technology.☆58Updated 2 years ago
- Index of the fully open source process design kits (PDKs) maintained by Google.☆102Updated 3 years ago
- Sphinx Extension which generates various types of diagrams from Verilog code.☆61Updated last year
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆23Updated 2 months ago
- ☆38Updated 3 years ago
- ☆17Updated 10 months ago
- ☆113Updated 2 years ago
- A library and command-line tool for querying a Verilog netlist.☆27Updated 3 years ago
- A SystemVerilog source file pickler.☆59Updated 10 months ago
- ☆49Updated 6 months ago