The-OpenROAD-Project / KicadParser
☆13Updated 4 years ago
Alternatives and similar repositories for KicadParser:
Users that are interested in KicadParser are comparing it to the libraries listed below
- ☆15Updated 4 years ago
- ☆29Updated 4 years ago
- Open Source Detailed Placement engine☆11Updated 5 years ago
- IO and Pin Placer for Floorplan-Placement Subflow☆22Updated 4 years ago
- Annealing-based PCB placement tool☆36Updated 4 years ago
- Welcome to Birds-of-a-Feather: Open-Source-Academic-EDA-Software !☆12Updated 5 years ago
- Macro placement tool for OpenROAD flow☆23Updated 4 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- Global Router Built for ICCAD Contest 2019☆30Updated 5 years ago
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Updated 6 years ago
- Delay Calculation ToolKit☆30Updated 2 years ago
- Gate-level timing estimation toolkit☆21Updated 2 years ago
- A custom C++ routine to identify logic gates in the layout extracted netlist (SPICE) of digital circuits and generate gate-level Verilog …☆29Updated 7 months ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- ☆14Updated 5 years ago
- Power grid analysis☆19Updated 4 years ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆55Updated 2 years ago
- DATC Robust Design Flow.☆37Updated 5 years ago
- VLSI EDA Global Router☆71Updated 7 years ago
- UCSD Detailed Router☆84Updated 4 years ago
- Steiner Shallow-Light Tree for VLSI Routing☆51Updated 8 months ago
- RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA☆90Updated 5 years ago
- Si2 LEF parser☆9Updated 4 years ago
- Parsing library for BLIF netlists☆18Updated 5 months ago
- Optimal gate sizing of digital circuits using geometric programming☆9Updated 8 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆26Updated 3 years ago
- A parallel global router using the Galois framework☆27Updated last year
- EDA wiki☆51Updated 2 years ago
- Collection of digital hardware modules & projects (benchmarks)☆52Updated 4 months ago
- EDA physical synthesis optimization kit☆51Updated last year