Qflow full end-to-end digital synthesis flow for ASIC designs
☆236Oct 26, 2024Updated 2 years ago
Alternatives and similar repositories for qflow
Users that are interested in qflow are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Qrouter detail router for digital ASIC designs☆60Nov 13, 2025Updated 11 months ago
- ☆114Feb 2, 2021Updated 5 years ago
- Magic VLSI Layout Tool☆725Updated this week
- Netgen complete LVS tool for comparing SPICE or verilog netlists☆149Oct 15, 2026Updated 2 weeks ago
- An open-source static random access memory (SRAM) compiler.☆1,168Updated this week
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology sc…☆1,988Mar 25, 2026Updated 7 months ago
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆460Updated this week
- OpenSTA engine☆636Updated this week
- IRSIM switch-level simulator for digital circuits☆39Nov 13, 2025Updated 11 months ago
- OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/☆3,238Updated this week
- XCircuit circuit drawing and schematic capture tool☆146Oct 15, 2026Updated 2 weeks ago
- Open source process design kit for usage with SkyWater Technology Foundry's 130nm node.☆3,770Jul 21, 2026Updated 3 months ago
- A High-performance Timing Analysis Tool for VLSI Systems☆721Dec 26, 2025Updated 10 months ago
- Yosys Open SYnthesis Suite☆4,854Updated this week
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…☆170Apr 1, 2026Updated 6 months ago
- A complete open-source design-for-testing (DFT) Solution☆210Aug 30, 2025Updated last year
- Verilog to Routing -- Open Source CAD Flow for FPGA Research☆1,280Updated this week
- KLayout Main Sources☆1,251Updated this week
- Guides and templates for using open source RF design tools with the SkyWater SKY130 process.☆19Nov 13, 2020Updated 5 years ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆155Mar 17, 2023Updated 3 years ago
- An automatic schematic generation tool which generates schematics from a SPICE netlist, usually of output from qflow.☆31Oct 25, 2020Updated 6 years ago
- mflowgen -- A Modular ASIC/FPGA Flow Generator☆300Jun 18, 2026Updated 4 months ago
- Copyleftist's Standard Cell Library☆107May 2, 2024Updated 2 years ago
- Deploy open-source AI quickly and easily - Special Bonus Offer • AdRunpod Hub is built for open source. One-click deployment and autoscaling endpoints without provisioning your own infrastructure.
- Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.☆138Feb 22, 2022Updated 4 years ago
- CVC: Circuit Validity Checker. Check for errors in CDL netlist.☆38Apr 9, 2026Updated 6 months ago
- Silicon-validated SoC implementation of the PicoSoc/PicoRV32☆299Jul 28, 2020Updated 6 years ago
- Version manager (and builder) for the Google sky130 and gf180mcu open-source PDKs☆82Nov 19, 2025Updated 11 months ago
- An Open-source FPGA IP Generator☆1,165Updated this week
- SystemVerilog to Verilog conversion☆758Aug 18, 2026Updated 2 months ago
- ☆65Jul 11, 2025Updated last year
- A padring generator for ASICs☆27May 17, 2023Updated 3 years ago
- GTKWave is a fully featured GTK+ based wave viewer for Unix and Win32 which reads LXT, LXT2, VZT, FST, and GHW files as well as standard …☆1,040Oct 23, 2026Updated last week
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Standard Cell Library based Memory Compiler using FF/Latch cells☆176Nov 10, 2025Updated 11 months ago
- Coriolis VLSI EDA Tool (LIP6)☆94Oct 18, 2026Updated last week
- 1G‑style Ethernet PHY PCS block in Sky130 using OpenLane☆18Feb 15, 2026Updated 8 months ago
- The next generation of OpenLane, rewritten from scratch with a modular architecture☆382Dec 2, 2025Updated 10 months ago
- FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.☆321Updated this week
- Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.☆417Feb 26, 2025Updated last year
- Open-Hardware implementation of the icsprout55-pdk☆18Oct 10, 2026Updated 2 weeks ago