UTDA-group / BoxRouterLinks
BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2D global routing and layer assignment. The 2D global routing is equipped with several ideas: such as robust negotiation-based A* search for routing stability, and topology-aware wire ripup for flexibility and …
☆21Updated 6 years ago
Alternatives and similar repositories for BoxRouter
Users that are interested in BoxRouter are comparing it to the libraries listed below
Sorting:
- CUGR, VLSI Global Routing Tool Developed by CUHK☆137Updated 2 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆58Updated 5 years ago
- DATC RDF☆50Updated 5 years ago
- UCSD Detailed Router☆90Updated 4 years ago
- Open Source Detailed Placement engine☆39Updated 5 years ago
- Pin-Accessible Legalization for Mixed-Cell-Height Circuits☆28Updated 3 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆137Updated 2 years ago
- Global Router Built for ICCAD Contest 2019☆33Updated 5 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆129Updated last year
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆105Updated last year
- VLSI EDA Global Router☆75Updated 7 years ago
- Analog Placement Quality Prediction☆24Updated 2 years ago
- A parallel global router using the Galois framework☆29Updated 2 years ago
- DATC Robust Design Flow.☆36Updated 5 years ago
- Xplace 3.0: An Extremely Fast, Extensible and Deterministic Placement Framework with Detailed-Routability and Timing Optimization☆138Updated 2 months ago
- ☆46Updated last year
- ☆33Updated 4 years ago
- the awesome work, project and lab of EDA (Electronic Design Automation). continue update...☆24Updated last year
- ☆57Updated 4 years ago
- GPU-based logic synthesis tool☆90Updated last month
- Bounded-Skew DME v1.3☆14Updated 7 years ago
- Library for VLSI CAD Design Useful parsers and solvers' api are implemented.☆177Updated 3 months ago
- ☆20Updated 2 years ago
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆48Updated 10 months ago
- Intel's Analog Detailed Router☆39Updated 6 years ago
- Collection of digital hardware modules & projects (benchmarks)☆60Updated last month
- ☆10Updated 5 months ago
- Assignments of Physical Design for Nanometer ICs (Spring 2017, Prof. Yao-Wen Chang)☆42Updated 6 years ago
- ☆13Updated 6 years ago
- The first version of TritonPart☆28Updated last year