LIS Network-on-Chip Implementation
☆34Aug 29, 2016Updated 9 years ago
Alternatives and similar repositories for lisnoc
Users that are interested in lisnoc are comparing it to the libraries listed below
Sorting:
- Network on Chip for MPSoC☆28Updated this week
- OpenExSys_NoC a mesh-based network on chip IP.☆20Dec 1, 2023Updated 2 years ago
- ☆82Oct 25, 2014Updated 11 years ago
- AXI DMA Check: A utility to measure DMA speeds in simulation☆15Jan 22, 2025Updated last year
- Functional Verification the MMU (Memory Management Unit) of a multiprocessor with Data Cache and Instruction Cache☆13Nov 9, 2015Updated 10 years ago
- OpTiMSoC - A tiled SoC platform with a mesh NoC and OpenRISC CPU cores☆88Mar 8, 2021Updated 4 years ago
- Designed a pipelined calculation engine to read input/weights of neuron and compute/store results in SystemVerilog. Implemented fabric to…☆12Feb 12, 2019Updated 7 years ago
- SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).☆14Apr 20, 2014Updated 11 years ago
- ☆21Sep 26, 2025Updated 5 months ago
- An Open Source Link Protocol and Controller☆28Aug 1, 2021Updated 4 years ago
- A configurable general purpose graphics processing unit for☆12May 18, 2019Updated 6 years ago
- A DMA Controller for RISCV CPUs☆13Aug 10, 2015Updated 10 years ago
- Simple demo showing how to use the ping pong FIFO☆16May 2, 2016Updated 9 years ago
- RTL Network-on-Chip Router Design in SystemVerilog by Andrea Galimberti, Filippo Testa and Alberto Zeni☆145Mar 19, 2018Updated 7 years ago
- General Purpose AXI Direct Memory Access☆62May 12, 2024Updated last year
- Public release☆58Sep 3, 2019Updated 6 years ago
- CNN accelerator using NoC architecture☆18Dec 6, 2018Updated 7 years ago
- Development of a Network on Chip Simulation using SystemC.☆34Jul 14, 2017Updated 8 years ago
- Generic Logic Interfacing Project☆48Jul 29, 2020Updated 5 years ago
- Implementation of a binary search tree algorithm in a FPGA/ASIC IP☆21Sep 5, 2021Updated 4 years ago
- A verilog implementation for Network-on-Chip☆81Feb 3, 2018Updated 8 years ago
- spi memory controller☆23Jan 5, 2017Updated 9 years ago
- a scaleable ring topology network on chip (NoC) implemented in BSV☆12Oct 14, 2014Updated 11 years ago
- openHMC - an open source Hybrid Memory Cube Controller☆50Apr 27, 2016Updated 9 years ago
- mirror of https://git.elphel.com/Elphel/eddr3☆41Oct 16, 2017Updated 8 years ago
- Network on Chip Implementation written in SytemVerilog☆197Aug 27, 2022Updated 3 years ago
- Open FPGA Modules☆24Oct 8, 2024Updated last year
- AXI4 with a FIFO integrated with VIP☆22Feb 29, 2024Updated 2 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆63Dec 15, 2025Updated 2 months ago
- Theia: ray graphic processing unit☆20Jul 17, 2014Updated 11 years ago
- xkDLA：XinKai Deep Learning Accelerator (RTL)☆39Jan 15, 2024Updated 2 years ago
- Python tools for processing Verilog files☆10Dec 7, 2011Updated 14 years ago
- Verilog-Based-NoC-Simulator☆10May 4, 2016Updated 9 years ago
- Ultra High Performance AXI4-based Direct Memory Access (DMA) Controller. This project was an interview assignment. Work in Progress.☆13Oct 19, 2024Updated last year
- OPAE porting to Xilinx FPGA devices.☆39Aug 5, 2020Updated 5 years ago
- Xilinx PCIe to MIG DDR4 example designs and custom part data files☆40Feb 4, 2024Updated 2 years ago
- OpenSoC Fabric - A Network-On-Chip Generator☆176Jun 18, 2020Updated 5 years ago
- ☆12Jul 28, 2022Updated 3 years ago
- RTL code for the DPU chip designed for irregular graphs☆13May 30, 2022Updated 3 years ago