amonemi / ProNoC
Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
☆53Updated 3 weeks ago
Alternatives and similar repositories for ProNoC:
Users that are interested in ProNoC are comparing it to the libraries listed below
- ☆31Updated 5 years ago
- A verilog implementation for Network-on-Chip☆72Updated 7 years ago
- General Purpose AXI Direct Memory Access☆48Updated 11 months ago
- ☆54Updated 4 years ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆36Updated 2 years ago
- ☆48Updated 2 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆61Updated last year
- ☆73Updated 10 years ago
- Xilinx AXI VIP example of use☆36Updated 3 years ago
- HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.☆74Updated 7 years ago
- SoC Based on ARM Cortex-M3☆29Updated last week
- 128KB AXI cache (32-bit in, 256-bit out)☆48Updated 3 years ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆61Updated 5 years ago
- eyeriss-chisel3☆40Updated 2 years ago
- A generic implementation of AMBA AXI4 communication protocol. The design provides a master, a slave and an interconnect with multiple mas…☆38Updated 2 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆65Updated 3 months ago
- ☆26Updated 5 years ago
- 16-bit Adder Multiplier hardware on Digilent Basys 3☆71Updated last year
- ☆26Updated 4 years ago
- Advanced Architecture Labs with CVA6☆56Updated last year
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆42Updated 4 years ago
- AHB DMA 32 / 64 bits☆54Updated 10 years ago
- BlackParrot on Zynq☆38Updated last month
- SystemVerilog modules and classes commonly used for verification☆47Updated 3 months ago
- HLS for Networks-on-Chip☆34Updated 4 years ago
- AXI4 and AXI4-Lite interface definitions☆94Updated 4 years ago
- Ratatoskr NoC Simulator☆24Updated 4 years ago
- INT8 & FP16 multiplier accumulator (MAC) design with UVM verification completed.☆98Updated 4 years ago
- round robin arbiter☆72Updated 10 years ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆165Updated 4 months ago