ShonTaware / SRAM_SKY130Links
Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
☆78Updated 4 years ago
Alternatives and similar repositories for SRAM_SKY130
Users that are interested in SRAM_SKY130 are comparing it to the libraries listed below
Sorting:
- ☆43Updated 3 years ago
- In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.☆85Updated last year
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆49Updated 4 years ago
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆66Updated 3 years ago
- Introductory course into static timing analysis (STA).☆97Updated 3 months ago
- This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK☆43Updated 3 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆74Updated 4 years ago
- IEEE 754 single and double precision floating point library in systemverilog and vhdl☆70Updated 9 months ago
- General Purpose AXI Direct Memory Access☆59Updated last year
- VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.☆45Updated 3 years ago
- The project is about building an 8-row by 8-bit 6T SRAM memory array, & a 3-to-8 decoder that's used to access the SRAM array. The layout…☆76Updated 3 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆44Updated 4 years ago
- SRAM☆22Updated 5 years ago
- Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…☆63Updated last year
- This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…☆37Updated 5 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆47Updated last year
- ASIC Design Kit for FreePDK45 + Nangate for use with mflowgen☆187Updated 5 years ago
- This is a tutorial on standard digital design flow☆79Updated 4 years ago
- ☆13Updated 6 months ago
- RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications☆176Updated 10 months ago
- Curriculum for a university course to teach chip design using open source EDA tools☆110Updated last year
- EE 260 Winter 2017: Advanced VLSI Design☆66Updated 8 years ago
- ☆174Updated 4 years ago
- Verilog RTL Design☆44Updated 4 years ago
- Open source process design kit for 28nm open process☆61Updated last year
- Python Tool for UVM Testbench Generation☆54Updated last year
- This repository aims to capture the works done in 5-day workshop of Adavance Physical Design using OpenLANE/SkyWater130. The workshop hel…☆22Updated 4 years ago
- Static Timing Analysis Full Course☆60Updated 2 years ago
- Open Source tool to build liberty files and for Characterizing Standard Cells.☆27Updated 4 years ago
- A verilog implementation for Network-on-Chip☆77Updated 7 years ago