VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft their ideas in RTL language, and convert the design to hardware using VSD (RTL-to-GDS) FLOW. VSDFLOW is completely build using OPHW tools, where the user gives input RTL in verilog. From here on the VSDFLOW ta…
☆19Jul 21, 2020Updated 5 years ago
Alternatives and similar repositories for vsdflow
Users that are interested in vsdflow are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆15Dec 2, 2021Updated 4 years ago
- An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop…☆14Jul 22, 2020Updated 5 years ago
- My personal Electronics projects versioning repo.☆13Dec 9, 2013Updated 12 years ago
- ☆17Sep 19, 2022Updated 3 years ago
- A simple tool to demonstrate the physical design steps of VLSI Design Flow.☆11Dec 13, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆16Aug 15, 2021Updated 4 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆49Dec 6, 2020Updated 5 years ago
- This repository is created for conducting RISC-V 5-day workshops☆23Jul 29, 2020Updated 5 years ago
- ☆37Apr 22, 2026Updated last week
- ☆20Aug 4, 2022Updated 3 years ago
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆37Dec 30, 2022Updated 3 years ago
- 5 Day TCL begginer to advanced training workshop by VSD☆19Oct 18, 2023Updated 2 years ago
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆26Jun 4, 2024Updated last year
- Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130☆82Sep 17, 2022Updated 3 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- This script builds openlane and all its dependencies on an Ubuntu (only) System.☆25Aug 12, 2022Updated 3 years ago
- ☆15Mar 9, 2026Updated last month
- Arbitrary Cell Generator enables parametrized grid-free circuit layout creation☆17Jun 1, 2020Updated 5 years ago
- ☆13Apr 22, 2021Updated 5 years ago
- I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.☆26Jul 23, 2023Updated 2 years ago
- A extremely size-optimized RV32I soft processor for FPGA.☆27Jun 19, 2018Updated 7 years ago
- ☆13Mar 25, 2022Updated 4 years ago
- SRAM Design using OpenSource Applications☆24Jul 16, 2021Updated 4 years ago
- ☆13May 11, 2022Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆84May 2, 2021Updated 4 years ago
- ☆38Jul 11, 2022Updated 3 years ago
- Superscalar Out-of-Order NPU Design on FPGA☆14May 17, 2024Updated last year
- Tensor Processing Unit implementation in Verilog☆13Mar 18, 2025Updated last year
- A caravan equipped with API for creating bus protocols in Chisel with ease.☆14Jan 15, 2026Updated 3 months ago
- 64-bit RISC-V processor☆17Nov 30, 2022Updated 3 years ago
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆51Aug 31, 2025Updated 8 months ago
- This project produces a clean GDSII Layout with all its details that are used to print photomasks used in the fabrication of a behavioral…☆15Oct 16, 2021Updated 4 years ago
- Various low power labs using sky130☆13Sep 3, 2021Updated 4 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- ☆46May 28, 2023Updated 2 years ago
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆13Aug 26, 2024Updated last year
- ☆41Feb 28, 2022Updated 4 years ago
- RV32I Implementation on TangNano9K☆12Dec 24, 2022Updated 3 years ago
- ☆21Nov 22, 2021Updated 4 years ago
- This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…☆81Nov 26, 2020Updated 5 years ago
- The verilog code together with cocotb testbench of BFU unit of a DIF FFT processor☆15Apr 11, 2023Updated 3 years ago