This repository aims to capture the works done in 5-day workshop of Adavance Physical Design using OpenLANE/SkyWater130. The workshop helps to familiarise with the efabless OpenLANE VLSI design flow RTL2GDS and the Skywater 130nm PDK.
☆22Jul 5, 2021Updated 4 years ago
Alternatives and similar repositories for OpenLANE-SkyWater130-workshop
Users that are interested in OpenLANE-SkyWater130-workshop are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Project 1.1 Simulate a Skywater 130nm standard cell using ngspice☆14Jul 18, 2025Updated 9 months ago
- This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an op…☆23Jul 7, 2021Updated 4 years ago
- Gate-level visualization generator for SKY130-based chip designs.☆20Jul 22, 2021Updated 4 years ago
- In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…☆20Aug 19, 2024Updated last year
- ☆24Nov 11, 2025Updated 5 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles☆37Dec 30, 2022Updated 3 years ago
- This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…☆57Jul 9, 2021Updated 4 years ago
- Index of the fully open source process design kits (PDKs) maintained by Google for GlobalFoundries technologies.☆52Jul 21, 2022Updated 3 years ago
- RISC-V Single-Cycle Processor Integrated With a Cache Memory System From RTL To GDS☆13Aug 26, 2024Updated last year
- Design and UVM Verification of an ALU☆13Jun 14, 2024Updated last year
- Index of the fully open source process design kits (PDKs) maintained by Google.☆110Sep 4, 2022Updated 3 years ago
- 2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…☆37Apr 13, 2024Updated 2 years ago
- ☆60Jul 11, 2025Updated 9 months ago
- This repository is an open-source version of SKY130 to help facilitate use of Cadence Design System tools for use with Skywater 130 Proce…☆33Jul 25, 2023Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- 5 stage pipeline implementation of RISC-V 32I Processor.☆10Nov 27, 2024Updated last year
- https://caravel-mgmt-soc-litex.readthedocs.io/en/latest/☆30Jan 21, 2025Updated last year
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 4 years ago
- PDK installer for open-source EDA tools and toolchains. Distributed with setups for the SkyWater 130nm and Global Foundries 180nm open p…☆420Apr 28, 2026Updated last week
- XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.☆71Nov 26, 2025Updated 5 months ago
- ☆124May 11, 2023Updated 2 years ago
- Python/Simulator integration using procedure calls☆10Mar 12, 2020Updated 6 years ago
- CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules☆11Jan 17, 2022Updated 4 years ago
- Cryptography accelerator core (for AES128/AES256 and SHA256) designed in Chisel3, primarily targeting ASIC platforms.☆10Jan 11, 2021Updated 5 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- A plugin to allow Jenkins Steps with Cadence vManager API☆10Jan 15, 2026Updated 3 months ago
- Demo SoC for SiliconCompiler.☆63Mar 29, 2026Updated last month
- Open source process design kit for 28nm open process☆79Apr 23, 2024Updated 2 years ago
- Examples from the Openlane repository, adapted as Fusesoc cores☆12May 18, 2021Updated 4 years ago
- Learning Path: RISC-V & Advanced Edge AI on SiFive FE310-G002 SoC | 32-bit RISC-V | 320 MHz | 16KB L1 Instruction Cache | 128Mbit (16MB) …☆12Sep 18, 2025Updated 7 months ago
- ☆10Sep 7, 2023Updated 2 years ago
- ☆13Apr 13, 2026Updated 3 weeks ago
- SOFA (Skywater Opensource FPGAs) based on Skywater 130nm PDK and OpenFPGA☆152Mar 17, 2023Updated 3 years ago
- Analog and RF blocks on Skywaters 130nm☆11Jul 30, 2022Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A vision transformer based framework for classifying executable images as benign or malicious☆10Mar 19, 2024Updated 2 years ago
- Ten Thousand Failures Blog☆12Jul 22, 2014Updated 11 years ago
- Source code & scripts for experimental characterization and demonstration of 1) simultaneous many-row activation, 2) up to nine-input maj…☆12May 17, 2024Updated last year
- Implements a simple UVM based testbench for a simple memory DUT.☆12Oct 26, 2019Updated 6 years ago
- A modern schematic entry and simulation program☆94Updated this week
- Tiny Tapeout project build tools + chip integration scripts☆32Updated this week
- ☆18May 5, 2022Updated 4 years ago