Alternatives and similar repositories for OpenLANE-SkyWater130-workshop

Users that are interested in OpenLANE-SkyWater130-workshop are comparing it to the libraries listed below

• AngeloJacobo / OpenLANE-Sky130-Physical-Design-Workshop
  Documentation for the 5 day workshop: Advanced Physical Design using OpenLane/Sky130
  ☆64Updated 2 years ago
• shariethernet / Physical-Design-with-OpenLANE-using-SKY130-PDK
  This project is done in the course of "Advanced Physical Design using OpenLANE/Sky130" workshop by VLSI System Design Corporation. In thi…
  ☆46Updated 4 years ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆70Updated 4 years ago
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆72Updated 4 years ago
• vlsiexcellence / Static-Timing-Analysis-Full-Course
  Static Timing Analysis Full Course
  ☆56Updated 2 years ago
• praharshapm / vsdmixedsignalflow
  This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…
  ☆44Updated 4 years ago
• manili / VSDBabySoC
  VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
  ☆43Updated 3 years ago
• MahmouodMagdi / Clock-Domain-Crossing-Synchronizers
  Developed with the aim of providing engineers and designers with a centralized resource, this repository serves as a valuable reference f…
  ☆60Updated last year
• pulp-platform / artistic
  An Open-Source Toolchain for Top-Metal IC Art and Ultra-High-Fidelity GDSII Renders
  ☆17Updated 2 months ago
• hanysalah / Design-Pattern-in-SV
  This repo is created to include illustrative examples on object oriented design pattern in SV
  ☆58Updated 2 years ago
• abdelazeem201 / Cadence-RTL-to-GDSII-Flow
  In this tutorial, you learn how to implement a design from RTL-to-GDSII using Cadence® tools.
  ☆66Updated last year
• sscs-ose / sscs-chipathon-2024
  ☆83Updated 6 months ago
• ShonTaware / OpenSource_Physical_Design
  This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
  ☆38Updated 3 years ago
• prasadp4009 / tbengy
  Python Tool for UVM Testbench Generation
  ☆53Updated last year
• kerimturak / tcore-rv32imc
  ☆12Updated 3 months ago
• OS-EDA / Course
  Home of the open-source EDA course.
  ☆42Updated last month
• dpretet / cdc
  Repository gathering basic modules for CDC purpose
  ☆54Updated 5 years ago
• brabect1 / sta_basics_course
  Introductory course into static timing analysis (STA).
  ☆94Updated last week
• shubhi704 / APB-Protocol
  ☆46Updated 4 years ago
• ShashankSirohiya / 100DaysOfRtl
  I am a VLSI enthusiast and I'm going to start my journey of 100 days of RTL.
  ☆24Updated last year
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆63Updated 2 weeks ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆20Updated last year
• dineshannayya / riscduino_dcore
  ☆12Updated last year
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆27Updated 4 years ago
• mbits-mirafra / axi4_avip
  ☆33Updated last month
• AnoushkaTripathi / NASSCOM-VSD-SoC-design-Program
  In this workshop, we will delve into the process of designing an Application Specific Integrated Circuit (ASIC) from the Register Transf…
  ☆11Updated 10 months ago
• kunalg123 / vsdflow
  VSDFLOW is an automated solution to programmers, hobbyists and small scale semiconductor technology entrepreneurs who can craft the…
  ☆161Updated 2 years ago
• efabless / chipignite-resources
  ☆79Updated 2 years ago
• semiDESIgner / 50daysRTLcode
  ☆17Updated 2 years ago