Alternatives and similar repositories for OpenSRAM

Users that are interested in OpenSRAM are comparing it to the libraries listed below

• rahulk29 / sram22
  A configurable SRAM generator
  ☆58Updated 5 months ago
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆72Updated last year
• lnis-uofu / TIGFET-10nm-PDK
  An open source PDK using TIGFET 10nm devices.
  ☆56Updated 3 years ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆37Updated 3 years ago
• openecos-projects / icsprout55-pdk
  55nm CMOS Open Source PDK by ICsprout Integrated Circuit Co., Ltd.
  ☆167Updated last month
• bespoke-silicon-group / bsg_sv2v
  A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
  ☆44Updated 2 years ago
• RIOSLaboratory / OpenXRAM
  sram/rram/mram.. compiler
  ☆46Updated 2 years ago
• FPGA-Research / eFPGA---RTL-to-GDS-with-SKY130
  This repo shows an implementation of an FPGA from RTL to GDS with open Skywater-130 pdk
  ☆38Updated 4 years ago
• ReuelReuben / vsdSRAM
  SRAM
  ☆22Updated 5 years ago
• efabless / sky130_sram_macros_old
  ☆38Updated 3 years ago
• StanfordVLSI / dragonphy2
  Open Source PHY v2
  ☆33Updated last year
• iic-jku / SKY130_SAR-ADC1
  Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
  ☆51Updated 10 months ago
• AUCOHL / Lighter
  An automatic clock gating utility
  ☆52Updated 9 months ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• pulp-platform / serial_link
  A simple, scalable, source-synchronous, all-digital DDR link
  ☆35Updated 2 months ago
• westonb / open-pmic
  A current mode buck converter on the SKY130 PDK
  ☆34Updated 4 years ago
• RoaLogic / Hamming-ECC
  Hamming ECC Encoder and Decoder to protect memories
  ☆34Updated last year
• USCPOSH / AMS_KGD
  A repository for Known Good Designs (KGDs). Does not contain any design files with NDA-sensitive information.
  ☆39Updated 4 years ago
• ucb-cs250 / caravel_fpga250
  FPGA250 aboard the eFabless Caravel
  ☆32Updated 5 years ago
• freechipsproject / ip-contributions
  For contributions of Chisel IP to the chisel community.
  ☆70Updated last year
• aignacio / mpsoc_example
  ☆60Updated 4 years ago
• yash-k99 / vsdsram
  Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM
  ☆19Updated 5 years ago
• fbrosser / DSP48E1-FP
  Project aimed at implementing floating point operators using the DSP48E1 slice.
  ☆30Updated 12 years ago
• vsdip / vsdsram
  An SRAM IP Uniquely designed with open source tools. Static RAM is a type of random-access memory that uses latching circuitry (flip-flop…
  ☆14Updated 5 years ago
• chipsalliance / f4pga-sdf-timing
  Python library for working Standard Delay Format (SDF) Timing Annotation files.
  ☆30Updated last year
• asinghani / sky130-chip-vis
  Gate-level visualization generator for SKY130-based chip designs.
  ☆20Updated 4 years ago
• b224hisl / rioschip
  ☆33Updated 3 years ago
• SymbioticEDA / MARLANN
  Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks
  ☆92Updated 6 years ago
• vsdip / avsddac_3v3_sky130_v1
  ☆13Updated 3 years ago
• idea-fasoc / fasoc
  ☆56Updated 2 years ago