☆17Jul 12, 2024Updated last year
Alternatives and similar repositories for sky130_sram_macros
Users that are interested in sky130_sram_macros are comparing it to the libraries listed below
Sorting:
- 基于机器视觉的焊缝检测机器人☆18Dec 15, 2023Updated 2 years ago
- Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns☆82May 2, 2021Updated 4 years ago
- Project work on Spatial modulation and Quadrature Spatial modulation☆11Apr 9, 2018Updated 7 years ago
- Lightweight Neural Architecture Search for Temporal Convolutional Networks at the Edge☆10Mar 6, 2023Updated 2 years ago
- Python tools for running xfoil many times☆10Sep 10, 2016Updated 9 years ago
- JAX implementation of MAML on the analog spiking neural network accelerator for the edge adaptation☆11Jan 26, 2023Updated 3 years ago
- BAG framework☆42Jul 24, 2024Updated last year
- List Decoder for the Polarization Weight family of Quantum Polar Code.☆12Feb 3, 2025Updated last year
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 4 years ago
- Bonfire SoC running on FireAnt FPGA Board☆12Feb 11, 2024Updated 2 years ago
- State-of-The-Art Rating-based RECOmmendation system: pytorch lightning implementation☆13Oct 10, 2023Updated 2 years ago
- OpenMP front-end based on LLVM for CGRAs☆10Oct 2, 2022Updated 3 years ago
- Utility to convert a KiCad netlist into a PCBNEW .kicad_pcb file.☆14Nov 4, 2025Updated 4 months ago
- vhdl related contents☆11Apr 27, 2020Updated 5 years ago
- React component that displays a popup only on iOS device (iphones, iPads...), aiming to install PWA app on the device.☆11May 28, 2024Updated last year
- clone from geda-project☆20Oct 24, 2025Updated 4 months ago
- Outputs a reduced keyspace of 8 upper alpha chars.☆10Oct 20, 2015Updated 10 years ago
- Classifier for CIFAR-10. Grayscaling, HOG, PCA, and RBF SVM. 62% test accuracy. Walkthrough on YouTube: https://youtu.be/gmTweV0eHhk☆14Nov 24, 2024Updated last year
- Matlab implementation of DSM☆14Nov 5, 2019Updated 6 years ago
- Tools for SystemVerilog development.☆15Jan 3, 2018Updated 8 years ago
- CLI util to execute a command for each file matching a glob☆12Nov 7, 2023Updated 2 years ago
- 2021电子设计竞赛工程文档☆11Dec 15, 2023Updated 2 years ago
- This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…☆48Dec 6, 2020Updated 5 years ago
- Pipelined MIPS architecture created in Verilog. Includes data forwarding and hazard detection.☆16Apr 1, 2018Updated 7 years ago
- Code accompanying the paper "A contrastive rule for meta-learning"☆13Oct 31, 2024Updated last year
- VUnit test explorer for VSCode☆12Dec 30, 2022Updated 3 years ago
- Design of 4KB Static RAM 1.8V (access time <2.5ns) using OpenRAM and Sky130 node☆14Mar 31, 2021Updated 4 years ago
- ☆12Sep 16, 2024Updated last year
- The Car Management System for the Formula Student Driverless vehicle built by MIT Driverless and Formula Student Team Delft☆10Sep 4, 2020Updated 5 years ago
- A hinter with snippeting for CodeMirror☆11Nov 17, 2020Updated 5 years ago
- Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).☆61Mar 5, 2023Updated 2 years ago
- RV32I[M][A][C][V]Zicntr[_Zicond]_Zicsr_Zihpm[_Zcb][_Zkne][_Xosvm] processor☆16Jan 6, 2026Updated last month
- ☆12Dec 22, 2020Updated 5 years ago
- ☆15Dec 2, 2021Updated 4 years ago
- 4th RISC-V Workshop Tutorials☆13Jul 19, 2016Updated 9 years ago
- Design & Implementation of Multi Clock Domain System using Verilog HDL☆13Oct 4, 2023Updated 2 years ago
- Electric Circuits Domain for webGME☆15Mar 30, 2023Updated 2 years ago
- Model-Agnostic Meta-Learning in PyTorch☆11Jul 31, 2020Updated 5 years ago
- A Verilog implementation of a pipelined MIPS processor☆11Oct 20, 2017Updated 8 years ago