Yinxiao-Feng / chiplet-network-simLinks
☆46Updated 4 months ago
Alternatives and similar repositories for chiplet-network-sim
Users that are interested in chiplet-network-sim are comparing it to the libraries listed below
Sorting:
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆97Updated 5 months ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆71Updated last year
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆39Updated 2 years ago
- A list of our chiplet simulaters☆43Updated 4 months ago
- ☆48Updated 2 months ago
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- gem5 repository to study chiplet-based systems☆82Updated 6 years ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆67Updated 2 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆76Updated 7 months ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆65Updated 10 months ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆72Updated 6 months ago
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆30Updated 2 years ago
- ☆29Updated 3 years ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆73Updated 2 years ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆16Updated last year
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆44Updated last month
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆41Updated 3 months ago
- ☆97Updated last year
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆81Updated 3 years ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆178Updated 3 years ago
- ☆60Updated 7 months ago
- ☆34Updated last year
- Release of stream-specialization software/hardware stack.☆120Updated 2 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆142Updated 4 months ago
- An integrated CGRA design framework☆91Updated 7 months ago
- The open-sourced version of BOOM-Explorer☆43Updated 2 years ago
- ☆19Updated 6 months ago
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆87Updated last year