FCAS-LAB / chiplet_simulatorsLinks
A list of our chiplet simulaters
☆41Updated 3 months ago
Alternatives and similar repositories for chiplet_simulators
Users that are interested in chiplet_simulators are comparing it to the libraries listed below
Sorting:
- An integrated CGRA design framework☆91Updated 6 months ago
- An Open-Source Tool for CGRA Accelerators☆74Updated 3 weeks ago
- A comprehensive tool that allows for system-level performance estimation of chiplet-based In-Memory computing (IMC) architectures.☆23Updated last year
- Template-based Reconfigurable Architecture Modeling Framework☆14Updated 3 years ago
- A toolchain for rapid design space exploration of chiplet architectures☆60Updated 2 months ago
- ☆44Updated 4 months ago
- A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.☆80Updated 3 years ago
- The open-sourced version of BOOM-Explorer☆43Updated 2 years ago
- gem5 repository to study chiplet-based systems☆81Updated 6 years ago
- A RISC-V BOOM Microarchitecture Power Modeling Framework☆29Updated 2 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆70Updated last year
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆64Updated 2 weeks ago
- High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS☆95Updated last year
- A low power platform based on X-HEEP and integrating the ESL-CGRA☆15Updated 3 weeks ago
- ☆34Updated last year
- MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)☆66Updated 4 years ago
- An Open-Source Tool for CGRA Accelerators☆24Updated 3 weeks ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆67Updated 2 years ago
- ☆59Updated 6 months ago
- PANDA: Architecture-Level Power Evaluation by Unifying Analytical and Machine Learning Solutions☆16Updated last year
- ☆17Updated last year
- ☆47Updated last month
- ☆11Updated 2 years ago
- CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.☆138Updated 3 months ago
- A reading list for SRAM-based Compute-In-Memory (CIM) research.☆84Updated 3 months ago
- ☆31Updated 11 months ago
- An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).☆84Updated last year
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆72Updated last year
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆93Updated 5 months ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆37Updated 2 months ago