Yinxiao-Feng / chiplet-actuaryLinks
Cost Model
☆15Updated 5 months ago
Alternatives and similar repositories for chiplet-actuary
Users that are interested in chiplet-actuary are comparing it to the libraries listed below
Sorting:
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆56Updated 4 years ago
- NVSim - A performance, energy and area estimation tool for non-volatile memory (NVM)☆122Updated 7 years ago
- ☆43Updated 3 months ago
- A fast and flexible simulation infrastructure for exploring general-purpose processing-in-memory (PIM) architectures. Ramulator-PIM combi…☆178Updated 2 years ago
- PIMSim is a Process-In-Memory Simulator with the compatibility of GEM5 full-system simulation.☆208Updated 2 years ago
- ☆29Updated 3 years ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆38Updated 2 years ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆66Updated 2 years ago
- PIMeval simulator and PIMbench suite☆33Updated last month
- gem5 repository to study chiplet-based systems☆81Updated 6 years ago
- ☆91Updated last year
- PUMA Compiler☆29Updated 5 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆22Updated 7 years ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆69Updated last year
- Hybrid Memory Cube Simulation & Research Infrastructure☆17Updated 3 months ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆93Updated 4 months ago
- ☆151Updated 7 months ago
- ☆65Updated 4 years ago
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆31Updated 3 years ago
- A dataflow architecture for universal graph neural network inference via multi-queue streaming.☆73Updated 2 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆113Updated 2 years ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆63Updated 9 months ago
- Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.☆77Updated 6 years ago
- A Cycle-level simulator for M2NDP☆30Updated last month
- End-to-end SoC simulation: integrating the gem5 system simulator with the Aladdin accelerator simulator.☆246Updated 2 years ago
- DAMOV is a benchmark suite and a methodical framework targeting the study of data movement bottlenecks in modern applications. It is inte…☆83Updated 2 years ago
- STONNE: A Simulation Tool for Neural Networks Engines☆138Updated 3 months ago
- An integrated power, area, and timing modeling framework for multicore and manycore architectures☆196Updated 5 years ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆90Updated 4 months ago