CastLab-KAIST / OpenMDS
☆13Updated 2 years ago
Alternatives and similar repositories for OpenMDS:
Users that are interested in OpenMDS are comparing it to the libraries listed below
- [FPGA'21] Microbenchmarks for Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers☆30Updated 3 years ago
- ☆25Updated 3 years ago
- ☆23Updated 4 years ago
- AIM: Accelerating Arbitrary-precision Integer Multiplication on Heterogeneous Reconfigurable Computing Platform Versal ACAP (Full Paper a…☆22Updated last month
- dMazeRunner: Dataflow acceleration optimization infrastructure for coarse-grained programmable accelerators☆45Updated 3 years ago
- Heterogenous ML accelerator☆18Updated 7 months ago
- ☆26Updated last year
- Processing in Memory Emulation☆20Updated 2 years ago
- STONNE Simulator integrated into SST Simulator☆19Updated last year
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆14Updated 3 months ago
- ☆16Updated last year
- ☆10Updated 2 years ago
- Public repostory for the DAC 2021 paper "Scaling up HBM Efficiency of Top-K SpMV forApproximate Embedding Similarity on FPGAs"☆14Updated 3 years ago
- A Cycle-level simulator for M2NDP☆26Updated this week
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆53Updated 3 years ago
- A Scalable BFS Accelerator on FPGA-HBM Platform☆14Updated last year
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆64Updated 10 months ago
- ☆28Updated 2 years ago
- ☆25Updated last year
- ☆16Updated 2 years ago
- A reference implementation of the Mind Mappings Framework.☆29Updated 3 years ago
- CasHMC: A Cycle-accurate Simulator for Hybrid Memory Cube☆21Updated 6 years ago
- NeuraChip Accelerator Simulator☆11Updated last year
- An open-source DRAM power model based on extensive experimental characterization of real DRAM modules. Described in the SIGMETRICS 2018 …☆38Updated 6 years ago
- ☆35Updated 4 years ago
- ☆9Updated 10 months ago
- High Bandwidth Memory (HBM) timing model based on DRAMSim2☆41Updated 7 years ago
- A fast, accurate trace-based simulator for High-Level Synthesis.☆44Updated last month
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆53Updated 4 months ago
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago