Alternatives and similar repositories for muchiSim

Users that are interested in muchiSim are comparing it to the libraries listed below

• cornell-zhang / HiSparse
  High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS
  ☆95Updated last year
• GT-CHIPS / gem5_chips
  gem5 repository to study chiplet-based systems
  ☆85Updated 6 years ago
• PolyArch / dsa-framework
  Release of stream-specialization software/hardware stack.
  ☆120Updated 2 years ago
• TeCSAR-UNCC / gem5-SALAM
  ☆108Updated last year
• ucb-bar / cosa
  A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)
  ☆83Updated 2 years ago
• UIUC-ChenLab / ScaleHLS-HIDA
  ☆60Updated 9 months ago
• casys-kaist / mNPUsim
  mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)
  ☆67Updated 2 weeks ago
• cwfletcher / buffets
  Implementations of Buffets, which are efficient, composable idioms for implementing Explicit Decoupled Data Orchestration.
  ☆81Updated 6 years ago
• Yinxiao-Feng / chiplet-network-sim
  ☆50Updated 6 months ago
• ecolab-nus / morpher
  An Open-Source Tool for CGRA Accelerators
  ☆79Updated 3 months ago
• maeri-project / MAERI_bsv
  MAERI: A DNN accelerator with reconfigurable interconnects to support flexible dataflow (http://synergy.ece.gatech.edu/tools/maeri/)
  ☆65Updated 4 years ago
• Systems-ShiftLab / MultiPIM
  MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator
  ☆55Updated 4 years ago
• linghaosong / Sextans
  An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).
  ☆92Updated last year
• arkhadem / aim_simulator
  A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0
  ☆51Updated 5 months ago
• diwu1990 / uSystolic-Sim
  A systolic array simulator for multi-cycle MACs and varying-byte words, with the paper accepted to HPCA 2022.
  ☆83Updated 4 years ago
• topanitanw / Cacti-7.0
  ☆20Updated 8 months ago
• tsinghua-ideal / spada-sim
  The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow
  ☆44Updated 2 years ago
• FCAS-LAB / chiplet_simulators
  A list of our chiplet simulaters
  ☆45Updated 6 months ago
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆69Updated 2 months ago
• hngenc / stellar
  ☆32Updated last year
• FCAS-LAB / Chiplet-Gem5-SharedMemory
  ☆38Updated last year
• stonne-simulator / stonne
  STONNE: A Simulation Tool for Neural Networks Engines
  ☆147Updated 6 months ago
• harvard-acc / smaug
  SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin
  ☆113Updated 2 years ago
• Aayush-Ankit / puma-simulator
  [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…
  ☆68Updated 2 years ago
• UVA-LavaLab / PIMeval-PIMbench
  PIMeval simulator and PIMbench suite
  ☆40Updated last month
• hplp / PiMulator
  Processing in Memory Emulation
  ☆22Updated 2 years ago
• SET-Scheduling-Project / GEMINI-HPCA2024
  Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators
  ☆106Updated 7 months ago
• breagen / MachSuite
  Benchmarks for Accelerator Design and Customized Architectures
  ☆135Updated 5 years ago
• VCA-EPFL / FSA
  FSA: Fusing FlashAttention within a Single Systolic Array
  ☆77Updated 4 months ago
• leesou / H2-LLM-ISCA-2025
  H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference
  ☆78Updated 7 months ago