Alternatives and similar repositories for Deeploy

Users that are interested in Deeploy are comparing it to the libraries listed below

• KULeuven-MICAS / zigzag
  HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators
  ☆160Updated last month
• DeepWok / mase
  Machine-Learning Accelerator System Exploration Tools
  ☆178Updated last week
• KULeuven-MICAS / stream
  Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.
  ☆58Updated 3 months ago
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆89Updated last week
• hngenc / systolic-array
  A DSL for Systolic Arrays
  ☆81Updated 6 years ago
• pulp-platform / ITA
  ☆49Updated 5 months ago
• VeriGOOD-ML / public
  ☆63Updated 5 months ago
• StanfordAHA / aha
  ☆61Updated this week
• actlab-genesys / GeneSys
  An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.
  ☆66Updated last week
• pulp-platform / redmule
  ☆76Updated 2 weeks ago
• pulp-platform / pulp-trainlib
  Floating-Point Optimized On-Device Learning Library for the PULP Platform.
  ☆36Updated last month
• pulp-platform / quadrilatero
  matrix-coprocessor for RISC-V
  ☆19Updated 5 months ago
• tum-ei-eda / muriscv-nn
  muRISCV-NN is a collection of efficient deep learning kernels for embedded platforms and microcontrollers.
  ☆86Updated last month
• MartaAndronic / NeuraLUT
  NeuraLUT-Assemble
  ☆41Updated last month
• tancheng / mlir-cgra
  An MLIR dialect to enable the efficient acceleration of ML model on CGRAs.
  ☆63Updated 11 months ago
• alexmr09 / Mixed-precision-Neural-Networks-on-RISC-V-Cores
  ☆34Updated 4 months ago
• gvsoc / gvsoc
  ☆32Updated this week
• esl-epfl / OpenEdgeCGRA
  An Open-Hardware CGRA for accelerated computation on the edge.
  ☆35Updated last year
• tancheng / CGRA-Flow
  CGRA-Flow is an integrated framework for CGRA compilation, exploration, synthesis, and development.
  ☆138Updated 3 months ago
• maeri-project / FEATHER
  A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching
  ☆64Updated 2 weeks ago
• tenstorrent / whisper
  ☆57Updated 3 weeks ago
• pulp-platform / pulp-nn
  ☆85Updated last year
• tancheng / CGRA-Mapper
  An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.
  ☆74Updated last month
• sharc-lab / HLSFactory
  HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond
  ☆43Updated 2 weeks ago
• makslevental / openhls
  PyTorch model to RTL flow for low latency inference
  ☆131Updated last year
• riscv-stc / riscv-matrix-project
  Top project for RISC-V Matrix extension proposal and related opensource implementations.
  ☆34Updated last year
• VCA-EPFL / FSA
  FSA: Fusing FlashAttention within a Single Systolic Array
  ☆51Updated last month
• gem5-X / TiC-SAT
  ☆17Updated 4 months ago
• kachris / survey_HA_LLM
  A survey on Hardware Accelerated LLMs
  ☆59Updated 8 months ago
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆108Updated 2 years ago