NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators
☆23Mar 20, 2025Updated last year
Alternatives and similar repositories for NeuroSpector
Users that are interested in NeuroSpector are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Nebula: Deep Neural Network Benchmarks in C++☆13Jan 2, 2025Updated last year
- NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators☆56Jan 2, 2025Updated last year
- Kite: Architecture Simulator for RISC-V Instruction Set☆20Mar 22, 2026Updated 2 months ago
- An example model of a Network Processing Unit using the PFPSim framework.☆14Aug 23, 2016Updated 9 years ago
- Arrow Matrix Decomposition - Communication-Efficient Distributed Sparse Matrix Multiplication☆15Mar 25, 2024Updated 2 years ago
- End-to-end encrypted email - Proton Mail • AdSpecial offer: 40% Off Yearly / 80% Off First Month. All Proton services are open source and independently audited for security.
- ☆19Apr 28, 2026Updated last month
- Repo for PyChart 1.39, refs http://download.gna.org/pychart/☆10Sep 29, 2014Updated 11 years ago
- An Open-Source SCAlable Interface for ISA Extensionsfor RISC-V Processors. New Version:☆17Feb 29, 2024Updated 2 years ago
- HLS project modeling various sparse accelerators.☆12Jan 11, 2022Updated 4 years ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆193Apr 27, 2026Updated last month
- RISC-V ISA based 32-bit processor written in HLS☆16Nov 7, 2019Updated 6 years ago
- ☆13Aug 1, 2024Updated last year
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆85Aug 28, 2023Updated 2 years ago
- A place to share libraries and utilities that don't belong in the core bsc repo☆40May 1, 2026Updated last month
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- A survey on architectural simulators focused on CPU caches.☆16Feb 8, 2020Updated 6 years ago
- ☆14Mar 7, 2022Updated 4 years ago
- ☆45Jun 30, 2024Updated last year
- MAERI public release☆32Sep 8, 2021Updated 4 years ago
- An HBM FPGA based SpMV Accelerator☆18Aug 29, 2024Updated last year
- A Fast DNN Accelerator Design Space Exploration Framework.☆46Aug 10, 2022Updated 3 years ago
- NeuraChip Accelerator Simulator☆16Apr 26, 2024Updated 2 years ago
- Collection of kernel accelerators optimised for LLM execution☆32Feb 26, 2026Updated 3 months ago
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆20Feb 16, 2024Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- [FPGA 2020] Open sourced implementation for the ACM/SIGDA FPGA '20 paper titled "GraphACT: Accelerating GCN Training on CPU-FPGA Heteroge…☆19Mar 6, 2021Updated 5 years ago
- HLSFactory: A Framework Empowering High-Level Synthesis Datasets for Machine Learning and Beyond☆53Mar 31, 2026Updated 2 months ago
- NOCulator is a network-on-chip simulator providing cycle-accurate performance models for a wide variety of networks (mesh, torus, ring, h…☆30Feb 6, 2023Updated 3 years ago
- ☆25Jun 3, 2024Updated 2 years ago
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆75Dec 29, 2025Updated 5 months ago
- Implementation of paper "GraphACT: Accelerating GCN Training on CPU-FPGA Heterogeneous Platform".☆12Jun 25, 2020Updated 5 years ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆205Jan 8, 2026Updated 5 months ago
- Hardware-accelerated sorting algorithm☆16May 4, 2020Updated 6 years ago
- ☆29Nov 5, 2021Updated 4 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Processing-In-Memory (PIM) Simulator☆238Dec 12, 2024Updated last year
- LLMs and the Future of Chip Design: Unveiling Security Risks and Building Trust☆39May 17, 2024Updated 2 years ago
- ☆23Mar 28, 2023Updated 3 years ago
- Next generation CGRA generator☆119May 26, 2026Updated 2 weeks ago
- DAC'22 paper: "Automated Accelerator Optimization Aided by Graph Neural Networks"☆41Oct 3, 2023Updated 2 years ago
- A co-design architecture on sparse attention☆55Aug 23, 2021Updated 4 years ago
- A set of tools for understanding F2FS usage of ZNS devices, which allow for identifying the on-device locations of files and inodes, mapp…☆20Jan 19, 2025Updated last year