A heterogeneous accelerator-centric compute cluster
☆40Apr 15, 2026Updated this week
Alternatives and similar repositories for snax_cluster
Users that are interested in snax_cluster are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆64Jul 5, 2025Updated 9 months ago
- Model LLM inference on single-core dataflow accelerators☆18Dec 16, 2025Updated 4 months ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆189Jan 23, 2026Updated 2 months ago
- ☆23Updated this week
- An open source, parameterized SystemVerilog digital hardware IP library☆33May 26, 2024Updated last year
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- ☆21May 13, 2024Updated last year
- CVA6 softcore contest☆23Apr 9, 2026Updated last week
- ☆22Apr 16, 2023Updated 3 years ago
- Driving Snax with MLIR☆21Updated this week
- A custom homebrew lichess client for the Nintendo Wii using the lichess API☆11Sep 10, 2024Updated last year
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆44Jun 16, 2025Updated 10 months ago
- A bit-level sparsity-awared multiply-accumulate process element.☆18Jul 9, 2024Updated last year
- Anatomy of a powerhouse: SystemVerilog TPU based on Google TPU v1☆21Nov 9, 2025Updated 5 months ago
- Petri Net Simulator program☆10Nov 27, 2017Updated 8 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- SAURIA (Systolic-Array tensor Unit for aRtificial Intelligence Acceleration) is an open-source Convolutional Neural Network accelerator b…☆88Nov 26, 2025Updated 4 months ago
- Simodense: a RISC-V softcore for custom SIMD instructions☆17Feb 16, 2026Updated 2 months ago
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆17Feb 16, 2024Updated 2 years ago
- A high-efficiency system-on-chip for floating-point compute workloads.☆45Jan 13, 2025Updated last year
- DLSlime: Flexible & Efficient Heterogeneous Transfer Toolkit☆95Apr 6, 2026Updated last week
- BlockCIrculantRNN (LSTM and GRU) using TensorFlow☆14Oct 30, 2018Updated 7 years ago
- This repository presents the mixed signal design of a Counter Type/ Ramp Type ADC. The Digital part of the circuit i.e 4- bit counter is …☆13May 2, 2022Updated 3 years ago
- Porting FreeRTOS to a RISC-V based system on PYNQ-Z2☆11Dec 26, 2024Updated last year
- An open-source simulator framework for neural processing units☆36Mar 23, 2026Updated 3 weeks ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- A small Neural Network Processor for Edge devices.☆18Nov 22, 2022Updated 3 years ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆12Aug 26, 2023Updated 2 years ago
- Code needed to reproduce results from my ICLR 2019 paper on fixed-point quantization of the backprop algorithm.☆10Jan 24, 2019Updated 7 years ago
- Pursuing the best performance of linear solver in circuit simulation☆42Mar 26, 2026Updated 3 weeks ago
- ☆10Jun 28, 2019Updated 6 years ago
- Hand Writing Digital Recognization Based on FPGA, we desiged a SoC embeded a Cortex M3 core and other peripherals，this SoC run a CNN. The…☆13Mar 30, 2023Updated 3 years ago
- The official NaplesPU hardware code repository☆24Jul 27, 2019Updated 6 years ago
- LSTM neural network (verilog)☆16Dec 5, 2018Updated 7 years ago
- This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platfor…☆24Dec 11, 2024Updated last year
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- Research enablement kit for designing and prototyping a Cortex-M0–based SoC with custom IP integration (education, research)☆16Jun 13, 2025Updated 10 months ago
- This repo is to inplemente the riscv soc on the xilinx pynq-z2 board☆12Dec 6, 2023Updated 2 years ago
- Universal number Posit HDL Arithmetic Architecture generator☆70Jun 24, 2019Updated 6 years ago
- Latest PyTorch Implementation of DeltaGRU & DeltaLSTM that Exploits Temporal Sparsity in Sequential Data☆17Sep 30, 2023Updated 2 years ago
- Long Short-Term Memory Neural Networks trained and tested on the TIMIT Acoustic-Phonetic Continuous Speech Corpus.☆11Aug 27, 2017Updated 8 years ago
- Microarchitecture implementation of the decoupled vector-fetch accelerator☆166Jan 25, 2024Updated 2 years ago
- ☆56Jan 29, 2024Updated 2 years ago