eml-eda / matchLinks
☆25Updated 2 months ago
Alternatives and similar repositories for match
Users that are interested in match are comparing it to the libraries listed below
Sorting:
- Accelergy is an energy estimation infrastructure for accelerator energy estimations☆147Updated 3 months ago
- STONNE: A Simulation Tool for Neural Networks Engines☆137Updated 2 months ago
- Repository to host and maintain SCALE-Sim code☆333Updated 2 weeks ago
- HW Architecture-Mapping Design Space Exploration Framework for Deep Learning Accelerators☆157Updated last week
- An analytical cost model evaluating DNN mappings (dataflows and tiling).☆225Updated last year
- Timeloop performs modeling, mapping and code-generation for tensor algebra workloads on various accelerator architectures.☆416Updated last month
- CHARM: Composing Heterogeneous Accelerators on Heterogeneous SoC Architecture☆151Updated this week
- A framework for fast exploration of the depth-first scheduling space for DNN accelerators☆40Updated 2 years ago
- ONNXim is a fast cycle-level simulator that can model multi-core NPUs for DNN inference☆146Updated 6 months ago
- CSV spreadsheets and other material for AI accelerator survey papers☆177Updated last year
- RTL implementation of Flex-DPE.☆109Updated 5 years ago
- ☆16Updated 2 years ago
- Tool for optimize CNN blocking☆94Updated 5 years ago
- ☆361Updated 2 years ago
- Benchmark framework of compute-in-memory based accelerators for deep neural network (inference engine focused)☆72Updated last year
- A co-design architecture on sparse attention☆51Updated 4 years ago
- ☆56Updated last year
- A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching☆59Updated last week
- ☆41Updated last year
- Multi-core HW accelerator mapping optimization framework for layer-fused ML workloads.☆58Updated last month
- FracBNN: Accurate and FPGA-Efficient Binary Neural Networks with Fractional Activations☆94Updated 3 years ago
- An open-source parameterizable NPU generator with full-stack multi-target compilation stack for intelligent workloads.☆62Updated 5 months ago
- ☆178Updated last year
- Explore the energy-efficient dataflow scheduling for neural networks.☆226Updated 5 years ago
- SMAUG: Simulating Machine Learning Applications Using Gem5-Aladdin☆112Updated 2 years ago
- Simulator for BitFusion☆101Updated 5 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆89Updated 4 months ago
- ☆70Updated 6 months ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆83Updated 2 years ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆69Updated 5 months ago