Alternatives and similar repositories for Chainsaw

Users that are interested in Chainsaw are comparing it to the libraries listed below

• thuCGRA / SpinalHDL_Chinese_Doc
  Translated SpinalHDL-Doc(v1.7.2) into Chinese
  ☆49Updated 2 years ago
• amonemi / ProNoC
  Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).
  ☆58Updated last week
• ultraembedded / core_sdram_axi4
  SDRAM controller with AXI4 interface
  ☆94Updated 5 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆90Updated 3 years ago
• abdelrhman-oun / DDR5_PHY_WriteOperation
  ☆56Updated 2 years ago
• opensmartnic / cocotb_primer
  understanding of cocotb （In Chinese Only）
  ☆17Updated last month
• aignacio / axi_dma
  General Purpose AXI Direct Memory Access
  ☆53Updated last year
• taneroksuz / fpu
  IEEE 754 single and double precision floating point library in systemverilog and vhdl
  ☆67Updated 6 months ago
• esynr3z / axi_vip_demo
  Xilinx AXI VIP example of use
  ☆41Updated 4 years ago
• dpretet / axi-crossbar
  An AXI4 crossbar implementation in SystemVerilog
  ☆161Updated 3 weeks ago
• ucb-bar / uciedigital
  Pure digital components of a UCIe controller
  ☆64Updated this week
• OSVVM / AXI4
  AXI4 Full, Lite, and AxiStream verification components. AXI4 Interface Master, Responder, and Memory verification components. AxiStream t…
  ☆137Updated 3 weeks ago
• pulp-platform / FlooNoC
  A Fast, Low-Overhead On-chip Network
  ☆214Updated last week
• pulp-platform / fpu
  ☆51Updated 6 years ago
• bakhshalipour / NoC-Verilog
  A verilog implementation for Network-on-Chip
  ☆74Updated 7 years ago
• mmxsrup / axi4-interface
  AXI4 and AXI4-Lite interface definitions
  ☆92Updated 4 years ago
• ic-lab-duth / RISC-V-Vector
  Vector processor for RISC-V vector ISA
  ☆121Updated 4 years ago
• kuladeepsaireddy / OpenNoc
  ☆34Updated 6 years ago
• adki / gen_amba
  AMBA bus generator including AXI, AHB, and APB
  ☆105Updated 3 years ago
• aignacio / ravenoc
  RaveNoC is a configurable HDL NoC (Network-On-Chip) suitable for MPSoCs and different MP applications
  ☆168Updated 7 months ago
• ananthbhat94 / DDR4MemoryController
  HDL code for a DDR4 memory controller implementing an Open Page Policy and Out of Order execution.
  ☆78Updated 7 years ago
• IA-C-Lab-Fudan / Chisel-FFT-generator
  FFT generator using Chisel
  ☆61Updated 3 years ago
• lewiz-support / LMAC_CORE3
  Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps
  ☆43Updated 2 years ago
• waviousllc / wav-lpddr-hw
  Wavious DDR (WDDR) Physical interface (PHY) Hardware
  ☆105Updated 3 years ago
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆65Updated 10 months ago
• jijingg / Spinal-bootcamp
  SpinalHDL-tutorial based on Jupyter Notebook
  ☆138Updated last year
• cnrv / CNRV-FPU
  Basic floating-point components for RISC-V processors
  ☆66Updated 5 years ago
• oprecomp / DDR4_controller
  ☆61Updated 4 years ago
• kunalg123 / icc2_workshop_collaterals
  This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…
  ☆33Updated 5 years ago
• openhwgroup / cv-hpdcache
  RTL sources of the High-Performance L1 Dcache (HPDcache) for OpenHW CV cores
  ☆86Updated last week