SpinalHDL Hardware Math Library
☆101Jul 12, 2024Updated last year
Alternatives and similar repositories for math
Users that are interested in math are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- List of SpinalHDL projects, libraries, and learning resources.☆30Jan 6, 2026Updated 5 months ago
- SpinalHDL - Cryptography libraries☆61Jul 19, 2024Updated last year
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated last year
- MR1 formally verified RISC-V CPU☆58Dec 16, 2018Updated 7 years ago
- ☆23Feb 15, 2023Updated 3 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- AdderNet ResNet20 for cifar10 written in SpinalHDL☆36Mar 14, 2021Updated 5 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆70Jan 8, 2024Updated 2 years ago
- SpinalHDL components for Corundum Ethernet☆15Aug 16, 2023Updated 2 years ago
- SpinalHDL-tutorial based on Jupyter Notebook☆152Jun 14, 2024Updated last year
- ☆316Jan 23, 2026Updated 4 months ago
- Labs to learn SpinalHDL☆158Jul 4, 2024Updated last year
- A reimplementation of a tiny stack CPU☆89Dec 8, 2023Updated 2 years ago
- Scala based HDL☆1,996Jun 2, 2026Updated last week
- The hardware implementation of Poseidon hash function in SpinalHDL☆21Jun 5, 2022Updated 4 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- CNN accelerator implemented with Spinal HDL☆160Jan 29, 2024Updated 2 years ago
- SoC based on VexRiscv and ICE40 UP5K☆163Mar 16, 2025Updated last year
- Control Logic Synthesis: Drawing the Rest of the OWL☆13Jun 17, 2024Updated last year
- Translate the source code of Veriog version to Spinalhdl version☆10Jul 1, 2021Updated 4 years ago
- ☆24May 6, 2023Updated 3 years ago
- ☆19Dec 21, 2020Updated 5 years ago
- Like VexRiscv, but, Harder, Better, Faster, Stronger☆229Updated this week
- SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype☆55Feb 2, 2026Updated 4 months ago
- Logic circuit analysis and optimization☆49Feb 2, 2026Updated 4 months ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- Dual-issue RV64IM processor for fun & learning☆64Jul 4, 2023Updated 2 years ago
- The sources of the online SpinalHDL doc☆31May 29, 2026Updated last week
- RISCV lock-step checker based on Spike☆14Mar 6, 2026Updated 3 months ago
- Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.☆23Oct 24, 2023Updated 2 years ago
- PDPU: An Open-Source Posit Dot-Product Unit for Deep Learning Applications☆45May 5, 2023Updated 3 years ago
- [FPL'24] This repository contains the source code for the paper “Revealing Untapped DSP Optimization Potentials for FPGA-based Systolic M…☆22May 6, 2024Updated 2 years ago
- Demo Sources for Learning Spinal HDL☆16Dec 5, 2022Updated 3 years ago
- ☆13Jan 20, 2023Updated 3 years ago
- ☆22Dec 27, 2024Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 21st century electronic design automation tools, written in Rust.☆37Updated this week
- Synthesize Verilog to Minecraft redstone☆22Nov 9, 2024Updated last year
- World's first Nintendo 3DS emulator for Apple devices based on Citra.☆18Apr 7, 2023Updated 3 years ago
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Mar 27, 2025Updated last year
- ☆15Mar 27, 2026Updated 2 months ago
- Collection of utlities for writing parsers. Includes a fast DIMACS CNF parser.☆15Nov 19, 2024Updated last year
- An out-of-order processor that supports multiple instruction sets.☆22Aug 23, 2022Updated 3 years ago