VexRiscv reference platforms for the pqriscv project
☆16Mar 9, 2024Updated 2 years ago
Alternatives and similar repositories for pqriscv-vexriscv
Users that are interested in pqriscv-vexriscv are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆19Aug 27, 2022Updated 3 years ago
- Docker Development Environment for SpinalHDL☆20Aug 8, 2024Updated last year
- A simple AXI4 DMA unit written in SpinalHDL.☆18Apr 18, 2020Updated 6 years ago
- ☆13Jun 9, 2022Updated 4 years ago
- MLKEM implementation optimized for embedded microcontrollers☆30Dec 1, 2025Updated 7 months ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- SpinalHDL based, FPGA Suitable RTL Implementation of RISC-V RV32. Aligned with RISC-V Virtual Prototype☆55Feb 2, 2026Updated 5 months ago
- This is the repository for the first-order masked Kyber on ARM Cortex-M4☆19Nov 2, 2023Updated 2 years ago
- Repository for the current status of the LESS submission☆12Jul 15, 2026Updated 2 weeks ago
- ☆10Apr 8, 2021Updated 5 years ago
- Useful utilities for BAR projects☆31Jan 3, 2024Updated 2 years ago
- A reimplementation of a tiny stack CPU☆89Dec 8, 2023Updated 2 years ago
- Hardware implementation of Saber☆10Jul 14, 2020Updated 6 years ago
- RISC-V processor☆32May 26, 2022Updated 4 years ago
- Masked implementations of PQ schemes for the Cortex-M4.☆15Mar 11, 2026Updated 4 months ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆13Feb 13, 2021Updated 5 years ago
- Short proof-of-concepts for STM32 boards using a very minimal interface☆18Jan 29, 2018Updated 8 years ago
- processor for post-quantum cryptography☆17Apr 17, 2020Updated 6 years ago
- Helper scripts used to clone RISC-V related git repos inside China.☆16Sep 17, 2020Updated 5 years ago
- ☆24May 6, 2023Updated 3 years ago
- Elements Software Development Kit☆13Jan 8, 2026Updated 6 months ago
- The SpinalHDL design of the Proteus core, an extensible RISC-V core.☆62Jun 18, 2026Updated last month
- RISCV lock-step checker based on Spike☆15Jul 20, 2026Updated last week
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- BFM Tester for Chisel HDL☆14Nov 27, 2021Updated 4 years ago
- ☆18Jul 9, 2025Updated last year
- ☆63Jul 11, 2025Updated last year
- Simple library for decoding RISC-V instructions☆23Jun 21, 2026Updated last month
- A programming language for FPGAs.☆19May 5, 2018Updated 8 years ago
- ☆13Feb 8, 2022Updated 4 years ago
- MicroPython - legacy branch contain old experiments, and experimental for new work☆33Sep 6, 2021Updated 4 years ago
- Chisel implementation of AES☆24Mar 27, 2020Updated 6 years ago
- OpenSoC Fabric - A Network-On-Chip Generator☆17Jun 12, 2017Updated 9 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆28Nov 21, 2019Updated 6 years ago
- Python library for operations with VCD and other digital wave files☆55May 19, 2026Updated 2 months ago
- Craft 2 top-level repository☆14May 15, 2019Updated 7 years ago
- A vector processor implemented in Chisel☆21Aug 3, 2014Updated 11 years ago
- ☆10Jan 24, 2022Updated 4 years ago
- Raccoon Signature Scheme -- Reference Code☆14Jul 12, 2023Updated 3 years ago
- ☆21Oct 28, 2024Updated last year