ywtseng / NTUPlacementView external linksLinks
☆14Oct 23, 2018Updated 7 years ago
Alternatives and similar repositories for NTUPlacement
Users that are interested in NTUPlacement are comparing it to the libraries listed below
Sorting:
- Reimplementation of the VLSI placement algorithm: ePlace and ePlace-MS☆54Nov 4, 2024Updated last year
- ☆10Mar 14, 2022Updated 3 years ago
- Official implementation of MacroRank: Ranking Macro Placement Solutions Leveraging Translation Equivariancy (ASP-DAC 2023)☆17Jun 3, 2023Updated 2 years ago
- BoxRouter2.0 is a new global router for ultimate routability. It is inspired by BoxRouter [1], but can perform multi-layer routing with 2…☆21Dec 20, 2018Updated 7 years ago
- REST, a reinforcement learning framework for constructing rectilinear Steiner Minimum tree (RSMT)☆59Apr 22, 2022Updated 3 years ago
- AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…☆109Mar 9, 2024Updated last year
- VLSI EDA Global Router☆80Jan 22, 2018Updated 8 years ago
- NTHU CS6135 VLSI Physical Design Automation Course Projects (include Two-way Min-cut Partitioning, Fixed-outline Slicing Floorplan Design…☆43Sep 7, 2025Updated 5 months ago
- Official open source repository for "A Timing Engine Inspired Graph Neural Network Model for Pre-Routing Slack Prediction" (DAC 2022)☆90Aug 22, 2024Updated last year
- Deep learning toolkit-enabled VLSI placement☆937Dec 28, 2025Updated last month
- KiCAD plugin written in Python for programatically placing clusters of components onto a PCB from a layout file.☆10Jun 30, 2021Updated 4 years ago
- ☆13Jul 19, 2024Updated last year
- Annealing-based PCB placement tool☆40May 26, 2020Updated 5 years ago
- This repo contains PPO implementation in PyTorch for LunarLander-v2☆11Jun 26, 2020Updated 5 years ago
- Code for new techniques of VLSI placement☆13Oct 11, 2013Updated 12 years ago
- Steiner Shallow-Light Tree for VLSI Routing☆62Jul 11, 2024Updated last year
- ☆10Dec 11, 2022Updated 3 years ago
- ☆10Apr 8, 2025Updated 10 months ago
- NTHU CS6135 VLSI實體設計自動化☆12Mar 12, 2022Updated 3 years ago
- DEPRECATED - please visit https://github.com/vwxyzjn/ppo-implementation-details☆46Apr 14, 2022Updated 3 years ago
- ICCAD-2021-B☆12Aug 5, 2021Updated 4 years ago
- VLSI placement and routing tool☆15Dec 20, 2025Updated last month
- Leetcode题解（C++版），代码 + 详细博客说明 ！☆11May 14, 2017Updated 8 years ago
- Courseworks of CS6165 VLSI Physical Design Automation, NTHU.☆50Jan 23, 2021Updated 5 years ago
- testing MLP, DQN, PPO, SAC, policy-gradient by snakeAI☆11May 6, 2025Updated 9 months ago
- [UNDER CONSTRUCTION]unofficial implementation of ABC-Net☆12Feb 5, 2018Updated 8 years ago
- Use 2D-CNN to deal with mit_bih_arryhthmia dataset (python)☆12Sep 28, 2019Updated 6 years ago
- ☆20Sep 15, 2024Updated last year
- Jupyter Notebook to accompany "Fixed-point DSP for Data Scientists" blog post 🧑💻🧑🔬☆16Mar 29, 2023Updated 2 years ago
- Rsyn – An Extensible Physical Synthesis Framework☆137Jul 20, 2024Updated last year
- ☆18Jun 17, 2020Updated 5 years ago
- Re-host of ISCAS89 sequential benchmark circuits in higher level verilog (without "DFF")☆15Dec 3, 2021Updated 4 years ago
- NGSPICE Simulation of CMOS Circuits☆19Jun 6, 2023Updated 2 years ago
- SiamAtt: Siamese attention network for visual tracking☆15Apr 29, 2021Updated 4 years ago
- Official implementation of paper "BBOPlace-Bench: Benchmarking Black-Box Optimization for Chip Placement".☆26Dec 19, 2025Updated last month
- Mt-KaHyPar (Multi-Threaded Karlsruhe Hypergraph Partitioner) is a shared-memory multilevel graph and hypergraph partitioner equipped with…☆172Updated this week
- A package used to test webrtc apm functions, such as aec, ns☆17Feb 21, 2019Updated 6 years ago
- OpenDesign Flow Database☆17Oct 31, 2018Updated 7 years ago
- ☆16May 11, 2018Updated 7 years ago