cgfandia / PathfinderAlgorithm
Pathfinder routing algorithm practice
☆14Updated 8 years ago
Alternatives and similar repositories for PathfinderAlgorithm
Users that are interested in PathfinderAlgorithm are comparing it to the libraries listed below
Sorting:
- Global Router Built for ICCAD Contest 2019☆31Updated 5 years ago
- Source codes and calibration scripts for clock tree synthesis☆40Updated 5 years ago
- A parallel global router using the Galois framework☆28Updated last year
- VLSI EDA Global Router☆73Updated 7 years ago
- DATC Robust Design Flow.☆37Updated 5 years ago
- Macro placement tool for OpenROAD flow☆23Updated 4 years ago
- Open Source Detailed Placement engine☆38Updated 5 years ago
- SMT-based Simultaneous Place-&-Route for Standard Cell Synthesis for PROBE 2.0☆17Updated 4 years ago
- OpenDesign Flow Database☆16Updated 6 years ago
- DATC RDF☆50Updated 4 years ago
- Routing Visualization for Physical Design☆19Updated 6 years ago
- ☆31Updated 3 years ago
- Intel's Analog Detailed Router☆38Updated 5 years ago
- LEF/DEF-based port of Iowa State's open-source FastRoute 4.1☆54Updated 4 years ago
- Collection of digital hardware modules & projects (benchmarks)☆58Updated last week
- ☆30Updated 4 years ago
- EDA Analytics Central☆15Updated 2 years ago
- ☆25Updated 2 years ago
- ☆23Updated 4 years ago
- An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit☆81Updated 2 weeks ago
- A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).☆55Updated 2 years ago
- EDA physical synthesis optimization kit☆54Updated last year
- UCSD Sizer for leakage/dynamic power recovery, timing recovery☆18Updated 6 years ago
- Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits☆58Updated 11 months ago
- Power grid analysis☆19Updated 4 years ago
- UCSD Detailed Router☆87Updated 4 years ago
- An open multiple patterning framework☆75Updated last year
- Optimal gate sizing of digital circuits using geometric programming☆11Updated 8 years ago
- Annealing-based PCB placement tool☆37Updated 4 years ago
- Dr. CU, VLSI Detailed Routing Tool Developed by CUHK☆134Updated 2 years ago