Alternatives and similar repositories for FPGA-CAD-Framework

Users that are interested in FPGA-CAD-Framework are comparing it to the libraries listed below

• vaughnbetz / COFFE
  ☆42Updated 8 months ago
• Centre-for-Hardware-Security / asap7_reference_design
  reference block design for the ASAP7nm library in Cadence Innovus
  ☆44Updated 11 months ago
• ShonTaware / OpenSource_Physical_Design
  This repository contains all the contents studied and created during the Advanced Physical Design Workshop using OpenLANE and SKY130 PDK
  ☆38Updated 3 years ago
• lnis-uofu / LSOracle
  IDEA project source files
  ☆106Updated 7 months ago
• bespoke-silicon-group / bsg_fakeram
  fakeram generator for use by researchers who do not have access to commercial ram generators
  ☆37Updated 2 years ago
• bsg-idea / uw_openroad_free45
  UW reference flow for Free45PDK and The OpenROAD Project
  ☆11Updated 5 years ago
• brabect1 / sta_basics_course
  Introductory course into static timing analysis (STA).
  ☆94Updated last month
• spider-tronix / Standard-Cell-Characterization
  Open Source tool to build liberty files and for Characterizing Standard Cells.
  ☆27Updated 4 years ago
• bojackchen / digital-flow
  This is a tutorial on standard digital design flow
  ☆78Updated 4 years ago
• scale-lab / DRUM
  The Verilog source code for DRUM approximate multiplier.
  ☆31Updated 2 years ago
• jinwookjungs / open_design_flow
  OpenDesign Flow Database
  ☆16Updated 6 years ago
• ispras / hdl-benchmarks
  Collection of digital hardware modules & projects (benchmarks)
  ☆59Updated last month
• The-OpenROAD-Project / DAC-2020-Tutorial
  Material for OpenROAD Tutorial at DAC 2020
  ☆47Updated 2 years ago
• parallaxsw / OpenSTA
  ☆70Updated this week
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆104Updated last year
• mortbopet / NetCracker
  NetCracker is an FPGA architecture analysis tool for facilitating the investigation of connectivity patterns within as well as in between…
  ☆17Updated 4 years ago
• rachelselinar / DREAMPlaceFPGA
  An Open-Source Analytical Placer for Large Scale Heterogeneous FPGAs using Deep-Learning Toolkit
  ☆82Updated last month
• asyncvlsi / AMC
  AMC: Asynchronous Memory Compiler
  ☆48Updated 4 years ago
• kunalg123 / icc2_workshop_collaterals
  This repository has a list of collaterals needed for ICC2 workshop. It has a modified version of raven_soc which was taped-out by Efables…
  ☆33Updated 5 years ago
• eclufsc / libertyParser
  Mirror of Synopsys's Liberty parser library
  ☆21Updated 6 years ago
• cuhk-eda / ripple-fpga
  RippleFPGA, A Simultaneous Pack-and-Place Algorithm for UltraScale FPGA
  ☆90Updated 5 years ago
• pulp-platform / svase
  ☆32Updated 5 months ago
• The-OpenROAD-Project-Attic / OpenROAD-Utilities
  Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project
  ☆19Updated 5 years ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆70Updated 4 years ago
• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• yash-k99 / vsdsram
  Design of 1024*32 (4kB) SRAM with access time < 2.5ns using OpenRAM
  ☆19Updated 4 years ago
• lana555 / dynamatic
  ☆86Updated last year
• ShonTaware / SRAM_SKY130
  Design of 1024x32 SRAM (32Kbits) using OpenRAM and SKY130 PDKs with operating voltage of 1.8V and access time < 2.5ns
  ☆70Updated 4 years ago
• ReuelReuben / vsdSRAM
  SRAM
  ☆22Updated 4 years ago
• greenblat / vlsistuff
  ideas and eda software for vlsi design
  ☆50Updated last week