gussmith23 / churchroadLinks
FPGA synthesis tool powered by equality saturation and program synthesis.
☆12Updated this week
Alternatives and similar repositories for churchroad
Users that are interested in churchroad are comparing it to the libraries listed below
Sorting:
- Control Logic Synthesis: Drawing the Rest of the OWL☆11Updated last year
- easter egg is a flexible, high-performance e-graph library with support of multiple additional assumptions at once☆13Updated 3 months ago
- work in progress, playing around with btor2 in rust☆11Updated 2 weeks ago
- BTOR2 MLIR project☆26Updated last year
- Random Generator of Btor2 Files☆10Updated last year
- FPGA synthesis tool powered by program synthesis☆51Updated last week
- ☆19Updated last year
- ☆13Updated 4 years ago
- E-morphic: Scalable Equality Saturation for Structural Exploration in Logic Synthesis (DAC2025)☆17Updated 3 weeks ago
- Bᴛᴏʀ2MLIR: A Format and Toolchain for Hardware Verification☆15Updated 7 months ago
- PyCaliper is Python-based tooling infrastructure that allows the verification and synthesis of specifications (properties) for RTL (e.g.,…☆22Updated last month
- Iodine: Verifying Constant-Time Execution of Hardware☆13Updated 4 years ago
- Tools for manipulating CHC and related files☆15Updated 2 years ago
- ☆13Updated 7 years ago
- Using e-graphs to synthesize netlists from boolean logic.☆14Updated last year
- Arithmetic multiplier benchmarks☆11Updated 7 years ago
- Integer Multiplier Generator for Verilog☆23Updated last week
- Automatically generate a compiler using equality saturation☆30Updated last year
- A tutorial for setting up Symbolic Quick Error Detection (SQED) using the model checker, CoSA, on the Ride Core☆12Updated 6 years ago
- ☆16Updated 3 years ago
- ☆15Updated 2 years ago
- Verilog AST☆21Updated last year
- rIC3 model checker for Hardware Model Checking Competition 2024(HWMCC'24) submission☆12Updated last week
- CoreIR Symbolic Analyzer☆73Updated 4 years ago
- A Coq framework to support structural design and proof of hardware cache-coherence protocols☆14Updated 3 years ago
- PolyGen is a code generator for the polyhedral model, written and proved in Coq.☆10Updated 4 years ago
- RTLCheck☆22Updated 6 years ago
- A low-level intermediate representation for hardware description languages☆28Updated 5 years ago
- Egraphs Modulo Theories☆15Updated last month
- ☆12Updated 2 years ago