Alternatives and similar repositories for lefdef

Users that are interested in lefdef are comparing it to the libraries listed below

• sanggido / OpenDP
  Open Source Detailed Placement engine
  ☆39Updated 5 years ago
• jinwookjungs / lefdef_util
  A LEF/DEF Utility.
  ☆32Updated 6 years ago
• The-OpenROAD-Project / OpenDB
  Database and Tool Framework for EDA
  ☆118Updated 4 years ago
• limbo018 / Limbo
  Library for VLSI CAD Design Useful parsers and solvers' api are implemented.
  ☆183Updated 5 months ago
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆57Updated 3 years ago
• Ravenslofty / librecell
  ☆26Updated 4 years ago
• luckyrantanplan / nthu-route
  VLSI EDA Global Router
  ☆75Updated 7 years ago
• purdue-onchip / gds2Para
  GDSII File Parsing, IC Layout Analysis, and Parameter Extraction
  ☆127Updated 2 years ago
• The-OpenROAD-Project / TritonRoute
  UCSD Detailed Router
  ☆91Updated 4 years ago
• parallaxsw / OpenSTA
  ☆90Updated last week
• liyanqing1987 / libertyParser
  liberty parser (For parsing IC timing lib file)
  ☆65Updated 2 years ago
• OpenTimer / Parser-Verilog
  A Standalone Structural Verilog Parser
  ☆99Updated 3 years ago
• The-OpenROAD-Project-Attic / FastRoute
  LEF/DEF-based port of Iowa State's open-source FastRoute 4.1
  ☆58Updated 5 years ago
• RsynTeam / rsyn-x
  Rsyn – An Extensible Physical Synthesis Framework
  ☆132Updated last year
• scale-lab / OpenPhySyn
  EDA physical synthesis optimization kit
  ☆62Updated last year
• bkoppelmann / lefdef-toolkit
  Source code for LEF/DEF
  ☆11Updated 7 years ago
• EDDRSoftware / gdsFileParser
  This library is a low level parser for the GDSII file format.
  ☆36Updated 8 years ago
• geochrist / dctk
  Delay Calculation ToolKit
  ☆32Updated 3 years ago
• jinwookjungs / datc_robust_design_flow
  DATC Robust Design Flow.
  ☆36Updated 5 years ago
• verilog-to-routing / tatum
  Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
  ☆62Updated last year
• Coloquinte / Coloquinte_placement
  An analytical VLSI placer
  ☆28Updated 3 years ago
• cuhk-eda / cu-gr
  CUGR, VLSI Global Routing Tool Developed by CUHK
  ☆138Updated 2 years ago
• pkuzjx / eda-collection
  ☆106Updated 5 years ago
• ieee-ceda-datc / RDF-2019
  DATC RDF
  ☆50Updated 5 years ago
• The-OpenROAD-Project-Attic / OpenROAD-Utilities
  Open-sourced utilities for initial flow setup, calibration, and other user functions for OpenROAD project
  ☆19Updated 6 years ago
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• ucb-art / BAG2_cds_ff_mpt
  BAG2 workspace for fake PDK (cds_ff_mpt)
  ☆59Updated 5 years ago
• abk-openroad / BST-DME
  Bounded-Skew DME v1.3
  ☆15Updated 7 years ago
• ABKGroup / PROBE3.0
  ☆47Updated last year
• zslwyuan / AMF-Placer
  AMF-Placer 2.0: An open-source timing-driven analytical mixed-size FPGA placer of heterogeneous resources (LUT/FF/LUTRAM/MUX/CARRY/DSP/BR…
  ☆105Updated last year