Alternatives and similar repositories for caplet

Users that are interested in caplet are comparing it to the libraries listed below

• ChrisZonghaoLi / gm_id_gf180mcu
  This repo contains introduction of gm/id method and its application to some OTA design examples.
  ☆18Updated last year
• ALIGN-analoglayout / AnalogDetailedRouter
  Intel's Analog Detailed Router
  ☆39Updated 6 years ago
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆38Updated 2 years ago
• martinjankoehler / klayout-pex
  Parasitic Extraction for KLayout
  ☆26Updated this week
• USCPOSH / AMPSE
  This is the repository of IPs of the group in USC who is developing Analog Mixed-signal Parameter Search Engine (AMPSE). You can download…
  ☆25Updated 2 years ago
• gdsfactory / skywater130
  skywater 130nm pdk
  ☆31Updated last week
• Vlsir / Vlsir
  Interchange formats for chip design.
  ☆31Updated 2 months ago
• bluecheetah / cbag
  A C++ VLSI circuit schematic and layout database library
  ☆14Updated last year
• magical-eda / MAGICAL-CIRCUITS
  Circuit release of the MAGICAL project
  ☆35Updated 5 years ago
• sgherbst / sky130-hello-world
  Minimal SKY130 example with self-checking LVS, DRC, and PEX
  ☆23Updated 4 years ago
• niftylab / laygo2
  LAYout with Gridded Objects v2
  ☆59Updated last month
• laurentc2 / SKY130_for_KLayout
  KLayout technology files for Skywater SKY130
  ☆40Updated 2 years ago
• dan-fritchman / Netlist
  Parsing and generating popular formats of circuit netlist
  ☆35Updated 2 years ago
• vsdip / vsdStdCellCharacterizer_sky130
  ☆20Updated 3 years ago
• aolofsson / IDEA
  ☆33Updated 5 years ago
• ChrisZonghaoLi / sky130_ldo_rl
  This repo contains the code that runs RL+GNN to optimize LDOs in SKY130 process.
  ☆39Updated last year
• stineje / CharLib
  Open-source repository for a standard-cell library characterizer using complete open-source tools
  ☆35Updated last week
• das-dias / novaad
  An EDA tool for automatic device sizing using Gm/Id method.
  ☆14Updated 10 months ago
• bmurmann / Ngspice-on-Colab
  Sandbox for experimenting with Ngspice and open PDKs in Google Colab
  ☆24Updated last year
• bluecheetah / bag
  BAG framework
  ☆41Updated last year
• ACMmodel / MOSFET_model
  A simple MOSFET model with only 5-DC-parameters for circuit simulation
  ☆45Updated last month
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆23Updated last month
• mabrains / sky130_klayout_pdk
  Skywater 130nm Klayout Device Generators PDK
  ☆31Updated last year
• RIOSLaboratory / OpenRPDK28
  Open source process design kit for 28nm open process
  ☆60Updated last year
• sgherbst / msdsl
  Automatic generation of real number models from analog circuits
  ☆42Updated last year
• ABKGroup / PROBE3.0
  ☆45Updated last year
• The-OpenROAD-Project / TritonCTS
  Source codes and calibration scripts for clock tree synthesis
  ☆40Updated 5 years ago
• OpenTimer / Parser-SPEF
  A Fast C++ Header-only Parser for Standard Parasitic Exchange Format (SPEF).
  ☆56Updated 3 years ago
• dwarning / VA-Models
  Verilog-A simulation models
  ☆78Updated last week
• patrickschulz / openPCells
  Parametric layout generator for digital, analog and mixed-signal integrated circuits
  ☆56Updated this week