yrrapt / caravel_amsat_txrx_icView external linksLinks
☆30Feb 4, 2021Updated 5 years ago
Alternatives and similar repositories for caravel_amsat_txrx_ic
Users that are interested in caravel_amsat_txrx_ic are comparing it to the libraries listed below
Sorting:
- An Amateur Radio Transceiver IC (2.4 / 5 / 10 GHz)☆73Oct 4, 2021Updated 4 years ago
- ☆12Dec 22, 2020Updated 5 years ago
- 12 bit SAR ADC IP in Skywater 130 nm PDK☆24May 30, 2024Updated last year
- components and examples for creating radio ICs using the open skywater 130nm PDK☆19Nov 29, 2020Updated 5 years ago
- 12-bit 10-KSPS Incremental Delta-Sigma ADC in Skywater 130 nm☆24May 13, 2023Updated 2 years ago
- ☆15Jun 22, 2023Updated 2 years ago
- ☆38Dec 29, 2022Updated 3 years ago
- Zero to ASIC group submission for MPW2☆13Mar 26, 2025Updated 10 months ago
- Tool to fetch and parse data about Efabless MPW projects☆15Jan 10, 2023Updated 3 years ago
- Test Chip General Purpose OpAmp using Skywater SKY130 PDK☆20Mar 1, 2021Updated 4 years ago
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 4 years ago
- submission repository for efabless mpw6 shuttle☆31Jan 10, 2024Updated 2 years ago
- Time to Digital Converter (TDC)☆36Dec 27, 2020Updated 5 years ago
- ☆38Nov 14, 2024Updated last year
- Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.☆137Feb 22, 2022Updated 3 years ago
- Intel's Analog Detailed Router☆40Jul 18, 2019Updated 6 years ago
- ☆20Dec 23, 2020Updated 5 years ago
- skywater 130nm pdk☆41Feb 10, 2026Updated last week
- Open Analog Design Environment☆25May 19, 2023Updated 2 years ago
- Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license☆51Mar 13, 2025Updated 11 months ago
- FFT algorithm coded in Verilog. Designed to run on a Xillinx Spartan 6 FPGA board.☆14Jul 19, 2012Updated 13 years ago
- ☆17Nov 25, 2017Updated 8 years ago
- SKILL / SKILL++ Syntax highlighting for vim☆11Nov 16, 2021Updated 4 years ago
- vhdl related contents☆11Apr 27, 2020Updated 5 years ago
- 32-bit RISC-V microcontroller☆12Sep 11, 2021Updated 4 years ago
- Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.☆30Jul 30, 2022Updated 3 years ago
- ☆41Feb 28, 2022Updated 3 years ago
- A 10bit SAR ADC in Sky130☆30Dec 4, 2022Updated 3 years ago
- Online viewer of Xschem schematic files☆28Dec 14, 2025Updated 2 months ago
- A modern schematic entry and simulation program☆84Feb 10, 2026Updated last week
- Audio filtering with pyfda and cocotb☆12Sep 24, 2020Updated 5 years ago
- 12 bit SAR ADC for TinyTapeout 7☆14May 30, 2024Updated last year
- A stochastic circuit optimizer for Cadence Virtuoso, using the NSGA-II genetic algorithm.☆12Dec 12, 2021Updated 4 years ago
- WISHBONE Interconnect☆11Oct 1, 2017Updated 8 years ago
- Skywater 130nm Klayout Device Generators PDK☆30Jul 12, 2024Updated last year
- ☆334Jan 13, 2026Updated last month
- Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.☆267Mar 26, 2022Updated 3 years ago
- Creation of a AXI Master and Yocto device driver for Zynq, using High Level Synthesis (HLS) techniques.☆13May 28, 2015Updated 10 years ago
- ☆15Dec 2, 2021Updated 4 years ago