Alternatives and similar repositories for avsddac_3v3_sky130_v1

Users that are interested in avsddac_3v3_sky130_v1 are comparing it to the libraries listed below

• vsdip / vsdsram_sky130
  ☆41Updated 3 years ago
• iic-jku / SKY130_SAR-ADC1
  Fully-differential asynchronous non-binary 12-bit SAR-ADC in SKY130, free to re-use under Apache-2.0 license
  ☆42Updated 4 months ago
• mattvenn / multi_project_tools
  tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles
  ☆36Updated 2 years ago
• christoph-weiser / mpw6
  submission repository for efabless mpw6 shuttle
  ☆30Updated last year
• RTimothyEdwards / capiche
  Parasitic capacitance analysis of foundry metal stackups
  ☆15Updated 2 months ago
• StefanSchippers / xschem_sky130
  XSCHEM symbol libraries for the Google-Skywater 130nm process design kit.
  ☆63Updated 2 weeks ago
• mattvenn / openlane_summary
  ☆22Updated last year
• muhammadaldacher / Analog-design-of-4-bit-current-steering-DACs
  This project shows the design of two 4-bit current steering DACs, based on Binary and Segmented architectures at VDD=1.8V supply, using h…
  ☆17Updated 2 months ago
• vsdip / avsddac_3v3_sky130_v2
  ☆16Updated 2 years ago
• westonb / sky130-analog
  Analog and power building blocks for sky130 pdk
  ☆20Updated 4 years ago
• mabrains / PLL_design
  PLL Designs on Skywater 130nm MPW
  ☆20Updated last year
• johnkustin / bandgapReferenceCircuit
  repository for a bandgap voltage reference in SKY130 technology
  ☆38Updated 2 years ago
• manili / VSDBabySoC
  VSDBabySoC is a small mixed-signal SoC including PLL, DAC, and a RISCV-based processor named RVMYTH.
  ☆43Updated 3 years ago
• nickson-jose / vsdstdcelldesign
  This repository contains all the information needed to run RTL2GDSII flow using openlane flow. Apart from that, it also contain procedure…
  ☆70Updated 4 years ago
• laurentc2 / SKY130_for_KLayout
  KLayout technology files for Skywater SKY130
  ☆40Updated last year
• sscs-ose / sscs-chipathon-2024
  ☆83Updated 6 months ago
• stineje / sky130RHBDlib
  Open-source RHBD (Radiation Hardened by Design) Standard-Cell Library for SKY130
  ☆8Updated last month
• snishizawa / libretto
  Characterizer
  ☆28Updated last month
• diadatp / sky130_rf_tools
  Guides and templates for using open source RF design tools with the SkyWater SKY130 process.
  ☆19Updated 4 years ago
• vsdip / avsdbgp_3v3_sky130_v1
  ☆11Updated 4 years ago
• parasjaing7 / avsdpll_3v3
  This repository contains simulation files and other relevant files on the On-chip clock multiplier (PLL) (Fclkin—5MHz to 12MHz, Fclkout—4…
  ☆15Updated 3 years ago
• praharshapm / vsdmixedsignalflow
  This project describes how the PNR of an analog IP, 2:1 analog multiplexer is carried out by opensource EDA tools, Openlane. It also disc…
  ☆44Updated 4 years ago
• mabrains / Analog_blocks
  Design of Analog Blocks in Skywaters 130nm meeting corners: different flavors of OTA, BandGap, LDO.
  ☆27Updated 2 years ago
• UAH-IC-Design-Team / sky130-10-bit-SAR-ADC
  A 10bit SAR ADC in Sky130
  ☆25Updated 2 years ago
• efabless / chipignite-resources
  ☆79Updated 2 years ago
• Deepak42074 / vsdsram_sky130
  Design of 4KB(1024*32) SRAM with operating voltage 1.8v and access time < 2.5ns
  ☆12Updated 4 years ago
• d-m-bailey / cvc
  CVC: Circuit Validity Checker. Check for errors in CDL netlist.
  ☆23Updated 2 weeks ago
• mabrains / OpenAnalogDesign
  Open Analog Design Environment
  ☆24Updated 2 years ago
• iic-jku / osic-multitool
  JKU IIC OSIC-Multitool for open-source IC (OSIC) design for SKY130.
  ☆65Updated 3 months ago
• ADC-TEAM2020 / avsdadc_3v3
  This repository will maintain simulation files, layout files and other relevant files on the SAR ADC worked on in the VSD Summer Online I…
  ☆20Updated 4 years ago