GPGPU supporting RISCV-V, developed with verilog HDL
☆161Feb 24, 2025Updated last year
Alternatives and similar repositories for ventus-gpgpu-verilog
Users that are interested in ventus-gpgpu-verilog are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- GPGPU processor supporting RISCV-V extension, developed with Chisel HDL☆933Jul 8, 2026Updated 3 weeks ago
- documentation for ventus gpgpu☆20Mar 25, 2025Updated last year
- Ventus GPGPU ISA Simulator Based on Spike☆52Jul 21, 2026Updated last week
- Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus☆34May 17, 2026Updated 2 months ago
- ☆2,175Updated this week
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- LLVM OpenCL C compiler suite for ventus GPGPU☆64Updated this week
- Chisel implementation of Neural Processing Unit for System on the Chip☆34May 22, 2026Updated 2 months ago
- The official NaplesPU hardware code repository☆35Jul 27, 2019Updated 7 years ago
- CORE-V MCU UVM Environment and Test Bench☆26Jul 19, 2024Updated 2 years ago
- AXI Verification using UVM Testbench☆16Oct 20, 2024Updated last year
- Open-source non-blocking L2 cache☆65Updated this week
- Open-source Neural Processing Unit (NPU) from China ❤☆52Jan 29, 2025Updated last year
- This is my hobby project with System Verilog to accelerate LeViT Network which contain CNN and Attention layer.☆39Aug 13, 2024Updated last year
- RISC-V vector and tensor compute extensions for Vortex GPGPU acceleration for ML workloads. Optimized for transformer models, CNNs, and g…☆25Apr 25, 2025Updated last year
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- This repository contains the hardware implementation for Static BFP convolution on FPGA☆10Oct 15, 2019Updated 6 years ago
- [TECS'23] A project on the co-design of Accelerators and CNNs.☆22Dec 10, 2022Updated 3 years ago
- ☆26Jul 22, 2026Updated last week
- Berkeley's Spatial Array Generator☆1,408Jun 30, 2026Updated 3 weeks ago
- A Fast, Low-Overhead On-chip Network☆321Updated this week
- OpenXuantie - OpenC910 Core☆1,458Jun 28, 2024Updated 2 years ago
- vector accelerating unit☆37Dec 1, 2020Updated 5 years ago
- A flexible, high-performance, user-friendly computer architecture simulator engine☆115Updated this week
- FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation☆120May 11, 2023Updated 3 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- An Open-Source Processor for Accelerating Spiking Neural Network☆13Sep 30, 2022Updated 3 years ago
- SystemVerilog Implementations of CUDA/TensorCore/TPU GEMM Operations☆22Apr 12, 2026Updated 3 months ago
- ☆14Jul 16, 2026Updated last week
- Parametric floating-point unit with support for standard RISC-V formats and operations as well as transprecision formats.☆624Updated this week
- L1 Data, L1 Instruction and L2 Unified Cache Design☆16May 26, 2026Updated 2 months ago
- FSA: Fusing FlashAttention within a Single Systolic Array☆190Apr 15, 2026Updated 3 months ago
- ☆23Mar 19, 2026Updated 4 months ago
- Linux-capable superscalar out-of-order RISC core (with Cache& MMU) and SoC, having been verified on Xilinx Kintex-7 FPGA.☆57Aug 14, 2024Updated last year
- Verification environment for the OpenHW Group's CORE-V High Performance Data Cache controller.☆26Jan 6, 2026Updated 6 months ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Design a Low-cost-AI-Accelerator based on Google's Tensor Processing Unit Version 1.☆23Jul 11, 2026Updated 2 weeks ago
- Simple AMBA VIP, Include axi/ahb/apb☆34Jul 4, 2024Updated 2 years ago
- A modular, parametrizable, and highly flexible Data Movement Accelerator (DMA)☆225Updated this week
- Open, Modular, Deep Learning Accelerator☆356Apr 10, 2024Updated 2 years ago
- ☆20Nov 4, 2024Updated last year
- MIAOW2.0 FPGA implementable design☆12Oct 18, 2017Updated 8 years ago
- SoC Based on ARM Cortex-M3☆40May 16, 2025Updated last year