Alternatives and similar repositories for pocl:

Users that are interested in pocl are comparing it to the libraries listed below

• riscv / riscv-bfloat16
  ☆34Updated 9 months ago
• ucb-bar / hwacha-template
  Template for projects using the Hwacha data-parallel accelerator
  ☆34Updated 4 years ago
• Jerc007 / Open-GPGPU-FlexGrip-
  FlexGripPlus: an open-source GPU model for reliability evaluation and micro architectural simulation
  ☆99Updated last year
• iree-org / iree-bare-metal-arm
  Example for running IREE in a bare-metal Arm environment.
  ☆33Updated last month
• XUANTIE-RV / tvm
  TVM for chips base on Xuantie CPU, an open deep learning compiler stack.
  ☆30Updated 10 months ago
• pulp-platform / hero
  Heterogeneous Research Platform (HERO) for exploration of heterogeneous computers consisting of programmable many-core accelerators and a…
  ☆101Updated last year
• plctlab / rvv-benchmark
  PLCT实验室 rvv-llvm 实现配套的 benchmark / testcases
  ☆22Updated 4 years ago
• esl-epfl / gem5-X
  The gem5-X open source framework (based on the gem5 simulator)
  ☆41Updated last year
• semidynamics / OpenVectorInterface
  Home of the specification to connect SemiDynamic's RISC-V cores to your own RISC-V Vector Unit
  ☆36Updated 3 years ago
• vortexgpgpu / NVPTX-SPIRV-Translator
  The translator that supports translating NVPTX to SPIR-V. This translator is modified from LLVM-SPIR-V Translator.
  ☆38Updated 3 years ago
• ucb-bar / virgo
  Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC
  ☆24Updated last month
• plctlab / plct-gem5
  upstream: https://github.com/RALC88/gem5
  ☆31Updated last year
• cornell-zhang / hcl-dialect
  HeteroCL-MLIR dialect for accelerator design
  ☆40Updated 7 months ago
• THU-DSP-LAB / ventus-gpgpu-isa-simulator
  Ventus GPGPU ISA Simulator Based on Spike
  ☆43Updated 2 weeks ago
• soDLA-publishment / somnia
  Learn NVDLA by SOMNIA
  ☆33Updated 5 years ago
• kumasento / polsca
  Polyhedral High-Level Synthesis in MLIR
  ☆30Updated 2 years ago
• compiler-dev / llvm-rv
  Full Support 32bit RISC-V in LLVM and CLANG for Vector Extension
  ☆43Updated 4 years ago
• kumasento / polymer
  Bridging polyhedral analysis tools to the MLIR framework
  ☆109Updated last year
• pulp-platform / hero-sdk
  ⛔ DEPRECATED ⛔ HERO Software Development Kit
  ☆20Updated 3 years ago
• Xilinx / mlir-air
  ☆93Updated this week
• ucb-bar / libgloss-htif
  A libgloss replacement for RISC-V that supports HTIF
  ☆34Updated 11 months ago
• bespoke-silicon-group / bsg_bladerunner
  Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)
  ☆40Updated last week
• THU-DSP-LAB / ventus-gpgpu-cpp-simulator
  Cycle-accurate C++ & SystemC simulator for the RISC-V GPGPU Ventus
  ☆25Updated 2 weeks ago
• embecosm / embecosm-toolchain-releases
  ☆16Updated last month
• TeCSAR-UNCC / gem5-SALAM
  ☆91Updated last year
• riscv-stc / riscv-matrix-spec
  RISC-V Matrix Specification
  ☆21Updated 4 months ago
• XUANTIE-RV / csi-nn2
  An optimized neural network operator library for chips base on Xuantie CPU.
  ☆90Updated 10 months ago
• THU-DSP-LAB / llvm-project
  LLVM OpenCL C compiler suite for ventus GPGPU
  ☆45Updated 2 weeks ago
• WuDan0399 / Integrate-NVDLA-and-TVM
  ☆30Updated 2 years ago
• camel-cdr / rvv-bench
  A collection of RISC-V Vector (RVV) benchmarks to help developers write portably performant RVV code
  ☆110Updated last month