This simulator models multi core systems, intended primarily for studies on main memory management techniques. It models a trace-based out-of-order core frontend and models memory scheduling policies such as FRFCFS, ATLAS, TCM, BLISS. Based on the ICCD 2014 paper by Subramanian et al. at http://users.ece.cmu.edu/~omutlu/pub/bliss-memory-schedule…
☆12Jan 18, 2016Updated 10 years ago
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