Here are some implementations of basic hardware units in RTL language (verilog for now), which can be used for area/power evaluation and support the hardware design tradeoff.
☆15Aug 25, 2023Updated 2 years ago
Alternatives and similar repositories for RTL_library_of_basic_hardware_units
Users that are interested in RTL_library_of_basic_hardware_units are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- The official implementation of HPCA 2025 paper, Prosperity: Accelerating Spiking Neural Networks via Product Sparsity☆41Aug 9, 2025Updated 11 months ago
- [DAC 2026] FlashFPS☆15Jun 1, 2026Updated last month
- ☆18Oct 3, 2024Updated last year
- ☆13Jul 24, 2018Updated 7 years ago
- [DATE'23] The official code for paper <CLAP: Locality Aware and Parallel Triangle Counting with Content Addressable Memory>☆24May 25, 2026Updated last month
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- Codes for our paper "Exploring Bit-Slice Sparsity in Deep Neural Networks for Efficient ReRAM-Based Deployment" [NeurIPS'19 EMC2 workshop]…☆10Oct 12, 2020Updated 5 years ago
- A scheduler for spatial DNN accelerators that generate high-performance schedules in one shot using mixed integer programming (MIP)☆85Aug 28, 2023Updated 2 years ago
- Systolic array based hardware for Image processing on the SPARTAN-6 FPGA☆13May 26, 2016Updated 10 years ago
- A bit-level sparsity-awared multiply-accumulate process element.☆19Jul 9, 2024Updated 2 years ago
- Neural Network-Hardware Co-design for Scalable RRAM-based BNN Accelerators☆11Apr 9, 2019Updated 7 years ago
- Official Implementation of SEA: Sparse Linear Attention with Estimated Attention Mask (ICLR 2024)☆12Jun 20, 2025Updated last year
- Notebooks for Hardware-Aware Training of Spiking Neural Networks. Open-Source Neuromorphic Circuit Design Tutorial at ESSCIRC 2023.☆26Sep 11, 2023Updated 2 years ago
- CNN Accelerator in Frequency Domain☆12Feb 22, 2020Updated 6 years ago
- [TCAD'23] AccelTran: A Sparsity-Aware Accelerator for Transformers☆62Nov 22, 2023Updated 2 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- ☆35Dec 22, 2025Updated 6 months ago
- Curated content for DNN approximation, acceleration ... with a focus on hardware accelerator and deployment☆29May 15, 2024Updated 2 years ago
- An automated HDC platform☆11Mar 16, 2026Updated 4 months ago
- GPGPU-Sim 中文注释版代码，包含 GPGPU-Sim 模拟器的最新版代码，经过中文注释，以帮助中文用户更好地理解和使用该模拟器。☆30Dec 18, 2024Updated last year
- ☆10Aug 2, 2021Updated 4 years ago
- ☆35Nov 6, 2024Updated last year
- Boolean Hypervectors with various operators for experiments in hyperdimensional computing (HDC).☆33Mar 5, 2026Updated 4 months ago
- ☆13Jan 7, 2025Updated last year
- including compiler to encode DGL GNN model to instructions, runtime software to transfer data and control the accelerator, and hardware v…☆14Nov 19, 2023Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Booth encoded Wallace tree multiplier☆17May 24, 2018Updated 8 years ago
- A intelligent matrix format designer for SpMV☆10Oct 10, 2023Updated 2 years ago
- ☆29Nov 5, 2021Updated 4 years ago
- A pytorch reimplementation of CheXNet.☆10Jun 26, 2018Updated 8 years ago
- Use FPGA to Transfer Image with Gigabits Ethernet☆19Dec 2, 2020Updated 5 years ago
- Lab code for three-day lecture, "Designing CNN Accelerators using Bluespec System Verilog", given at SNU in December 2017☆31Sep 22, 2018Updated 7 years ago
- [IPSN 2024] Lifelong Intelligence Beyond the Edge using Hyperdimensional Computing☆14May 16, 2024Updated 2 years ago
- [ICML 2026] Official implementation of "FOCUS: DLLMs Know How to Tame Their Compute Bound".☆17May 5, 2026Updated 2 months ago
- - A 1X3 Router (capable of routing the data packets to three different clients form a single source network) was designed, including a re…☆11Jun 3, 2019Updated 7 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- A common API for interfacing with secure services☆17Jul 10, 2026Updated last week
- A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems☆209Nov 27, 2024Updated last year
- Network-on-Chip simulator (Booksim) with hooks for co-simulating RTL designs in Verilog.☆25Nov 2, 2015Updated 10 years ago
- ☆41Oct 21, 2025Updated 9 months ago
- AI Accelerators-SC23-tutorial Repository☆12Nov 12, 2023Updated 2 years ago
- 基于 Google Scholar 的论文他引次数统计。☆14Dec 8, 2022Updated 3 years ago
- Accelerator for Hyperdimensional Computing (HDC)☆37May 5, 2024Updated 2 years ago