ucb-art / fft
☆21Updated 4 years ago
Alternatives and similar repositories for fft:
Users that are interested in fft are comparing it to the libraries listed below
- CHIPKIT: An agile, reusable open-source framework for rapid test chip development☆40Updated 4 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- Provides dot visualizations of chisel/firrtl circuites☆12Updated 5 years ago
- Chisel implementation of AES☆23Updated 4 years ago
- Prototype-network-on-chip (ProNoC) is an EDA tool that facilitates prototyping of custom heterogeneous NoC-based many-core-SoC (MCSoC).☆48Updated 6 months ago
- A lightweight core for the CV32E40 implementing the RISC-V vector extension specification. (v0.8)☆31Updated 3 years ago
- a hardware design library based on SpinalHDL, especially for stream processing operators on Xilinx FPGAs for Arithmetic, DSP, Communicati…☆57Updated last year
- A 32-bit RISC-V Processor Designed with High-Level Synthesis☆50Updated 4 years ago
- ☆24Updated 5 years ago
- Public release☆49Updated 5 years ago
- ☆25Updated 10 months ago
- The Verilog source code for DRUM approximate multiplier.☆29Updated last year
- CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform☆19Updated 9 months ago
- Basic floating-point components for RISC-V processors☆63Updated 5 years ago
- fakeram generator for use by researchers who do not have access to commercial ram generators☆34Updated 2 years ago
- AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…☆75Updated 9 months ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆59Updated 5 years ago
- HLS for Networks-on-Chip☆32Updated 3 years ago
- Binary Single Precision Floating-point Fused Multiply-Add Unit Design (Verilog HDL)☆17Updated 11 years ago
- An Open-Hardware CGRA for accelerated computation on the edge.☆13Updated 4 months ago
- ☆77Updated 10 months ago
- ☆70Updated 10 years ago
- Xilinx AXI VIP example of use☆32Updated 3 years ago
- LCAI-TIHU HW is an AI inference processor which is comprised of RISC-V cpu, nvdla, NoC bus, PCIe module, DDR, SRAM, bootROM, DMA and peri…☆33Updated 2 years ago
- HW-SW Co-Simulation Library for AMBA AXI BFM using DPI/VPI☆30Updated 3 weeks ago
- Advanced Architecture Labs with CVA6☆54Updated last year
- Project repo for the POSH on-chip network generator☆43Updated last year
- ☆40Updated 5 years ago
- ☆50Updated 3 years ago