Alternatives and similar repositories for riscv-hpmcounters

Users that are interested in riscv-hpmcounters are comparing it to the libraries listed below

• hanhwi / SimPoint
  ☆13Updated 3 years ago
• ucb-bar / libgloss-htif
  A libgloss replacement for RISC-V that supports HTIF
  ☆35Updated last year
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆25Updated 7 months ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆40Updated last year
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 6 years ago
• cnrv / RVWC2021-slides
  第一届 RISC-V 中国峰会的幻灯片等资料存放
  ☆37Updated 2 years ago
• OpenXiangShan / xfuzz
  Fuzzing General-Purpose Hardware Designs with Software Fuzzers
  ☆16Updated last week
• NetTLP / adapter
  An FPGA-based NetTLP adapter
  ☆26Updated 5 years ago
• CTSRD-CHERI / garnet
  Amazon F1-inspired Xilinx VCU118 hardware design framework
  ☆12Updated 4 years ago
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆21Updated 2 months ago
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆33Updated 3 years ago
• cwfletcher / oisa
  Data oblivious ISA prototyped on the RISC-V BOOM processor.
  ☆21Updated 2 years ago
• nbdd0121 / TLBSim
  Fast TLB simulator for RISC-V systems
  ☆14Updated 5 years ago
• zero-day-labs / riscv-iommu-demo
  RISC-V IOMMU Demo (Linux & Bao)
  ☆20Updated last year
• aakahlow / gem5Valid_Haswell
  ☆18Updated 5 years ago
• shengwenliang / fpga-nvme-controller
  Chisel NVMe controller
  ☆16Updated 2 years ago
• li3tuo4 / rc-fpga-zcu
  Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)
  ☆61Updated 2 years ago
• comparch-security / chipyard-random-llc
  A Rocket-Chip with a Dynamically Randomized LLC
  ☆13Updated 7 months ago
• ymanerka / rtlcheck
  RTLCheck
  ☆21Updated 6 years ago
• melver / mc2lib
  Memory consistency model checking and test generation library.
  ☆15Updated 8 years ago
• janweinstock / or1kmvp
  An OpenRISC 1000 multi-core virtual platform based on SystemC/TLM
  ☆12Updated last month
• zero-day-labs / riscv-aia
  AIA IP compliant with the RISC-V AIA spec
  ☆40Updated 3 months ago
• VerticalResearchGroup / microbench
  Extremely Simple Microbenchmarks
  ☆33Updated 6 years ago
• agra-uni-bremen / symex-vp
  A concolic testing engine for RISC-V embedded software with support for SystemC peripherals
  ☆23Updated last year
• comparch-security / cpu-sec-bench
  Security Test Benchmark for Computer Architectures
  ☆21Updated 2 months ago
• ics-jku / riscv-vp-plusplus
  RISCV-VP++ is a extended and improved successor of the RISC-V based Virtual Prototype (VP) RISC-V VP. It is maintained at the Institute f…
  ☆36Updated this week
• iscas-tis / riscv-spec-core
  Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.
  ☆13Updated 3 weeks ago
• ljwljwljwljw / DiplomaticBackend
  ☆17Updated 3 years ago
• IBM / rocc-software
  C/Assembly macros for talking with Rocket Custom Coprocessors (RoCCs)
  ☆55Updated 4 years ago
• embecosm / embecosm-toolchain-releases
  ☆16Updated 2 weeks ago