Alternatives and similar repositories for dblclockfft

Users that are interested in dblclockfft are comparing it to the libraries listed below

• ZipCPU / dspfilters
  A collection of demonstration digital filters
  ☆154Updated last year
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆155Updated 2 years ago
• ZipCPU / dpll
  A collection of phase locked loop (PLL) related projects
  ☆108Updated last year
• owocomm-0 / fpga-fft
  A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm
  ☆119Updated 4 years ago
• esynr3z / corsair
  Control and Status Register map generator for HDL projects
  ☆127Updated 3 months ago
• benreynwar / fft-dit-fpga
  Verilog module for calculation of FFT.
  ☆182Updated 13 years ago
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆180Updated last week
• yol / ethernet_mac
  Tri-mode (10/100/1000) full-duplex FPGA ethernet MAC in VHDL
  ☆174Updated last year
• kevinpt / vhdl-extras
  Flexible VHDL library
  ☆189Updated 2 years ago
• alexforencich / verilog-lfsr
  Fully parametrizable combinatorial parallel LFSR/CRC module
  ☆156Updated 6 months ago
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆396Updated this week
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆235Updated 2 years ago
• ZipCPU / cordic
  A series of CORDIC related projects
  ☆113Updated 10 months ago
• analogdevicesinc / fpgahdl_xilinx
  (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…
  ☆89Updated 7 years ago
• hukenovs / intfftk
  Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…
  ☆87Updated 2 years ago
• hamsternz / DisplayPort_Verilog
  A Verilog implementation of DisplayPort protocol for FPGAs
  ☆255Updated 6 years ago
• projf / display_controller
  FPGA display controller with support for VGA, DVI, and HDMI.
  ☆237Updated 5 years ago
• ldoolitt / vhd2vl
  ☆136Updated 9 months ago
• alexforencich / verilog-wishbone
  Verilog wishbone components
  ☆118Updated last year
• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆94Updated 5 years ago
• fusesoc / fusesoc-cores
  FuseSoC standard core library
  ☆147Updated 3 months ago
• paulscherrerinstitute / psi_fpga_all
  Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.
  ☆39Updated last year
• ZipCPU / wbuart32
  A simple, basic, formally verified UART controller
  ☆309Updated last year
• dawsonjon / FPGA-radio
  Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC
  ☆109Updated 8 years ago
• enjoy-digital / usb3_pipe
  USB3 PIPE interface for Xilinx 7-Series
  ☆228Updated 3 years ago
• damdoy / ice40_ultraplus_examples
  Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
  ☆282Updated last year
• mattvenn / fpga-sdft
  sliding DFT for FPGA, targetting Lattice ICE40 1k
  ☆77Updated 5 years ago
• ATaylorCEngFIET / MicroZed-Chronicles
  Source code from the MicroZed Chronicles blog hosted by Xcell Daily Blog
  ☆197Updated 6 years ago
• ZipCPU / wb2axip
  Bus bridges and other odds and ends
  ☆587Updated 5 months ago
• ZipCPU / fftdemo
  A demonstration showing how several components can be compsed to build a simulated spectrogram
  ☆46Updated last year