Alternatives and similar repositories for PAWS

Users that are interested in PAWS are comparing it to the libraries listed below

• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• rob-ng15 / Silice-Playground
  Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice
  ☆35Updated 2 years ago
• daveshah1 / prjtrellis-dvi
  DVI video out example for prjtrellis
  ☆16Updated 6 years ago
• lawrie / blackicemxbook
  ☆26Updated 5 years ago
• GuzTech / ulx3s-nmigen-examples
  nMigen examples for the ULX3S board
  ☆16Updated 4 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 5 years ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆30Updated 3 years ago
• no2fpga / no2muacm
  Drop In USB CDC ACM core for iCE40 FPGA
  ☆34Updated 3 years ago
• mattvenn / crap-o-scope
  crap-o-scope scope implementation for icestick
  ☆20Updated 7 years ago
• kbeckmann / pergola_projects
  My pergola FPGA projects
  ☆30Updated 4 years ago
• gregdavill / litex-hyperram
  Standard HyperRAM core for ECP5 written in Litex/Migen
  ☆14Updated 5 years ago
• ironsteel / nes_ecp5
  NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board
  ☆37Updated 2 years ago
• ECP5-PCIe / ECP5-Utils
  Utilities for the ECP5 FPGA
  ☆18Updated 3 years ago
• mattvenn / logLUTs
  Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.
  ☆21Updated last year
• lawrie / ulx3s_bit_streams
  Bit streams forthe Ulx3s ECP5 device
  ☆17Updated 2 years ago
• tomverbeure / fpga_quick_ram_update
  Quickly update a bitstream with new RAM contents
  ☆15Updated 4 years ago
• mmicko / cross-fpga
  Cross compile FPGA tools
  ☆21Updated 4 years ago
• mattvenn / vga-clock
  Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.
  ☆62Updated 3 years ago
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆13Updated 6 years ago
• emeb / up5k_riscv
  There are many RISC V projects on iCE40. This one is mine.
  ☆15Updated 5 years ago
• tmeissner / gatemate_experiments
  Experiments with Cologne Chip's GateMate FPGA architecture
  ☆15Updated last year
• lawrie / ulx3s_retro
  Retro computing on the Ulx3s ECP5 FPGA board
  ☆24Updated 3 years ago
• lawrie / ulx3s_cores
  Information on cores available on the Ulx3s ECP5 FPGA board
  ☆14Updated 5 years ago
• YosysHQ / prjpeppercorn
  Project Peppercorn - GateMate FPGA Bitstream Documentation
  ☆23Updated this week
• jevinskie / General-Slow-DDR3-Interface
  A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.
  ☆12Updated 2 years ago
• xobs / lxbuildenv
  Simplified environment for litex
  ☆14Updated 4 years ago
• tinyvision-ai-inc / UPduino-v2.1
  UPduino
  ☆27Updated 5 years ago
• GuzTech / misato
  RISC-V Processor written in Amaranth HDL
  ☆38Updated 3 years ago
• lambdaconcept / lambdasoc
  ☆44Updated 4 months ago
• ulx3s / fpga-odysseus
  FPGA Odysseus with ULX3S
  ☆66Updated last year