A stream to RTL compiler based on MLIR and CIRCT
☆17Nov 15, 2022Updated 3 years ago
Alternatives and similar repositories for circt-stream
Users that are interested in circt-stream are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- A repository to test dialects defined dynamically.☆12Jun 20, 2023Updated 3 years ago
- Declarative MLIR compilers in Python!☆37Oct 9, 2020Updated 6 years ago
- HeteroCL-MLIR dialect for accelerator design☆43Sep 18, 2024Updated 2 years ago
- MATLAB/Octave generator of Hamming ECC coding. Output format is Verilog HDL.☆12Dec 27, 2022Updated 3 years ago
- A testing ground for quantum computing compilation ideas in xdsl☆13Updated this week
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Using e-graphs to synthesize netlists from boolean logic.☆14Jul 26, 2023Updated 3 years ago
- Symbolic range analysis for LLVM.☆12Jan 10, 2016Updated 10 years ago
- 📥 🎯 (1,4/4) an MLIR-based toolchain with Vitis HLS LLVM input/output targeting FPGAs.☆16Nov 15, 2022Updated 3 years ago
- An LLVM pass to prove that an II works for the given loop for Vitis HLS☆11Aug 22, 2021Updated 5 years ago
- CIRCT-based HLS compilation flows, debugging, and cosimulation tools.☆56Jul 17, 2023Updated 3 years ago
- Hardware generator debugger☆79Feb 12, 2024Updated 2 years ago
- A template for writing CS papers with latex -- includes CI, todonotes, ...☆46Sep 16, 2026Updated last month
- A minimal in MLIR dialect along the lines of STG to represent laziness.☆17Jan 7, 2022Updated 4 years ago
- Xilinx Modifications to Halide☆14May 3, 2021Updated 5 years ago
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- (WIP) A relatively simple pipelined RISC-V core, written in Bluespec SystemVerilog☆12Sep 9, 2021Updated 5 years ago
- ☆17Oct 13, 2026Updated 3 weeks ago
- A strongly-typed, compiled dialect of Python.☆13Jan 28, 2024Updated 2 years ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆41Jan 16, 2025Updated last year
- MLIR tools and dialect for GraphBLAS☆18Mar 30, 2022Updated 4 years ago
- ☆15Sep 30, 2026Updated last month
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- New MLIR dialect, attributes, and transformations for generating host driver code for AXI-based linalg accelerators.☆11Jan 8, 2024Updated 2 years ago
- Wrapper for ETH Ariane Core☆21Sep 2, 2025Updated last year
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆52Jan 16, 2025Updated last year
- A hardware compiler based on LLHD and CIRCT☆271Jun 30, 2025Updated last year
- E-Graphs, natively in MLIR☆49Updated this week
- The 'missing header' for Chisel☆24Feb 5, 2026Updated 8 months ago
- VS Code RISC-V Extension☆12Aug 31, 2026Updated 2 months ago
- Synopsys Verdi applet that presents a view of the source code running on a RISC-V processor with a simulation waveform.☆34Feb 6, 2020Updated 6 years ago
- Intel Compiler for SystemC☆31Jun 1, 2023Updated 3 years ago
- Svg based heatmaps in Elm☆15May 10, 2017Updated 9 years ago
- An LLVM pass that can generate CDFG and map the target loops onto a parameterizable CGRA.☆86Jan 6, 2026Updated 9 months ago
- Simple, predictable pricing with DigitalOcean hosting • AdAlways know what you'll pay with monthly caps and flat pricing. Enterprise-grade infrastructure trusted by 600k+ customers.
- SQL Optimizations using MLIR